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Kauffman networks: Analysis and applications
KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.ORCID iD: 0000-0001-7382-9408
KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
2005 (English)In: ICCAD-2005: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, 2005, 479-484 p.Conference paper, Published paper (Refereed)
Abstract [en]

A Kauffman network is an abstract model of gene regulatory networks. Each gene is represented by a vertex. An edge from one vertex to another implies that the former gene regulates the latter. Statistical features of Kauffman networks match the characteristics of living cells. The number of cycles in the network's state space, called attractors, corresponds to the number of different cell types. The attractor's length corresponds to the cell cycle time. The sensitivity of attractors; to different kinds of disturbances, modeled by changing a network connection, the state of a vertex, or the associated function, reflects the stability of the cell to damage, mutations and virus attacks. In order to evaluate attractors, their number and lengths have to be computed. This problem is the major open problem related to Kauffman networks. Available algorithms can only handle networks with less than a hundred vertices. The number of genes in a cell is often larger. In this paper, we present a set of efficient algorithms for computing attractors in large Kauffman networks. The resulting software package is hoped to be of assistance in understanding the principles of gene interactions and discovering a computing scheme operating on these principles.

Place, publisher, year, edition, pages
2005. 479-484 p.
Series
IEEE international conference on computer-aided design, ISSN 1063-6757
Keyword [en]
random boolean networks, model, graph
National Category
Computer Science
Identifiers
URN: urn:nbn:se:kth:diva-24444DOI: 10.1109/ICCAD.2005.1560115ISI: 000234559700067Scopus ID: 2-s2.0-33751394685OAI: oai:DiVA.org:kth-24444DiVA: diva2:349919
Conference
IEEE/ACM International Conference on Computer Aided Design San Jose, CA, NOV 06-10, 2005
Note

QC 20100909

Available from: 2010-09-09 Created: 2010-09-09 Last updated: 2012-11-01Bibliographically approved
In thesis
1. Advances in Functional Decomposition: Theory and Applications
Open this publication in new window or tab >>Advances in Functional Decomposition: Theory and Applications
2006 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Functional decomposition aims at finding efficient representations for Boolean functions. It is used in many applications, including multi-level logic synthesis, formal verification, and testing.

This dissertation presents novel heuristic algorithms for functional decomposition. These algorithms take advantage of suitable representations of the Boolean functions in order to be efficient.

The first two algorithms compute simple-disjoint and disjoint-support decompositions. They are based on representing the target function by a Reduced Ordered Binary Decision Diagram (BDD). Unlike other BDD-based algorithms, the presented ones can deal with larger target functions and produce more decompositions without requiring expensive manipulations of the representation, particularly BDD reordering.

The third algorithm also finds disjoint-support decompositions, but it is based on a technique which integrates circuit graph analysis and BDD-based decomposition. The combination of the two approaches results in an algorithm which is more robust than a purely BDD-based one, and that improves both the quality of the results and the running time.

The fourth algorithm uses circuit graph analysis to obtain non-disjoint decompositions. We show that the problem of computing non-disjoint decompositions can be reduced to the problem of computing multiple-vertex dominators. We also prove that multiple-vertex dominators can be found in polynomial time. This result is important because there is no known polynomial time algorithm for computing all non-disjoint decompositions of a Boolean function.

The fifth algorithm provides an efficient means to decompose a function at the circuit graph level, by using information derived from a BDD representation. This is done without the expensive circuit re-synthesis normally associated with BDD-based decomposition approaches.

Finally we present two publications that resulted from the many detours we have taken along the winding path of our research.

Place, publisher, year, edition, pages
Stockholm: KTH, 2006. xi,176 p.
Series
Trita-ICT-ECS AVH, ISSN 1653-6363 ; 06:06
Keyword
computer science, electronic system design, Boolean decomposition, binary decision diagram, logic synthesis, graph algorithm
National Category
Computer Science
Identifiers
urn:nbn:se:kth:diva-4135 (URN)
Public defence
2006-10-12, E, KTH Forum, Isafjordsgatan 39, Kista, 09:00
Opponent
Supervisors
Note
QC 20100909Available from: 2006-10-09 Created: 2006-10-09 Last updated: 2010-09-09Bibliographically approved

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Dubrova, Elena

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