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Low-cost uncooled microbolometers for thermal imaging
KTH, School of Electrical Engineering (EES), Microsystem Technology.
KTH, School of Electrical Engineering (EES), Microsystem Technology.ORCID iD: 0000-0002-0525-8647
KTH, School of Electrical Engineering (EES), Microsystem Technology.ORCID iD: 0000-0003-3452-6361
KTH, School of Electrical Engineering (EES), Microsystem Technology.ORCID iD: 0000-0002-9820-8728
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2010 (English)In: OPTICAL SENSING AND DETECTION / [ed] Francis Berghmans, Anna G. Mignani, Chris A. van Hoof, 2010, Vol. 7726, 772611- p.Conference paper (Refereed)
Abstract [en]

Cost efficient integration technologies and materials for manufacturing of uncooled infrared bolometer focal plane arrays (FPA) are presented. The technology platform enables 320x240 pixel resolution with a pitch down to 20 mu m and very low NETD.

A heterogeneous 3D MEMS integration technology called SOIC (Silicon-On-Integrated-Circuit) is used to combine high performance Si/SiGe bolometers with state-of-the-art electronic read-out-integrated-circuits.

The SOIC integration process consists of: (a) Separate fabrication of the CMOS wafer and the MEMS wafer. (b) Adhesive wafer bonding. (c) Sacrificial removal of the MEMS handle wafer. (d) Via-hole etching. (e) Via formation and MEMS device definition. (f) Sacrificial etching of the polymer adhesive. We will present an optimized process flow that only contains dry etch processes for the critical process steps. Thus, extremely small, sub-micrometer feature sizes and vias can be implemented for the infrared bolometer arrays.

The Si/SiGe thermistor is grown epitaxially, forming a mono-crystalline multi layer structure. The temperature coefficient of resistance (TCR) is primarily controlled by the concentration of Ge present in the strained SiGe layers. TCR values of more than 3%/K can be achieved with a low signal-to-noise ratio due to the mono-crystalline nature of the material. In addition to its excellent electrical properties, the thermistor material is thermally stable up to temperatures above 600 degrees C, thus enabling the novel integration and packaging techniques described in this paper.

Vacuum sealing at the wafer level reduces the overall costs compared to encapsulation after die singulation. Wafer bonding is performed using a Cu-Sn based metallic bonding process followed by getter activation at >= 350 degrees C achieving a pressure in the 0.001 mbar range. After assembling, the final metal phases are stable and fully compatible with high-temperature processes. Hermeticity over the product lifetime is accomplished by well-controlled electro-deposition of metal layers, optimized bonding parameters and a suitable bond frame design.

Place, publisher, year, edition, pages
2010. Vol. 7726, 772611- p.
, Proceedings of SPIE-The International Society for Optical Engineering, ISSN 0277-786X ; 7726
Keyword [en]
Automotive, Bolometer, SiGe, MEMS, IR-sensor, Infrared, 3D-integration, Packaging
National Category
Engineering and Technology
URN: urn:nbn:se:kth:diva-25355DOI: 10.1117/12.855752ISI: 000285287900035ScopusID: 2-s2.0-77953787334ISBN: 978-0-8194-8199-3OAI: diva2:358593
Conference on Optical Sensing and Detection, Brussels, BELGIUM, APR 12-15, 2010
QC 20101022Available from: 2010-10-22 Created: 2010-10-19 Last updated: 2011-11-22Bibliographically approved

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Roxhed, NiclasNiklaus, FrankFischer, AndreasForsberg, FredrikSamel, BjörnWissmar, Stanley
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