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Fabrication Technology for Efficient High Power Silicon Carbide Bipolar Junction Transistors
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
2011 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The superior characteristics of Silicon Carbide as a wide band gap semiconductor have motivated many industrial and non-industrial research groups to consider SiC for the next generations of high power semiconductor devices. The SiC Bipolar Junction Transistor (BJT) is one candidate for high power applications due to its low on-state power loss and fast switching capability. However, to compete with other switching devices such as Field Effect Transistors (FETs) or IGBTs, it is necessary for a power SiC BJT to provide a high current gain to reduce the power required from the drive circuit. In this thesis implantation free 4H-SiC BJTs with linearly graded base layer have been demonstrated with common-emitter current gain of 50 and open-base breakdown voltage of 2700 V. Also an efficient junction termination extension (JTE) with 80% of theoretical parallel-plane breakdown voltage was analyzed by fabrication of high voltage PiN diodes to achieve an optimum dose of remaining JTE charge. Surface passivation of 4H-SiC BJT is an essential factor for efficient power BJTs. Therefore different passivation techniques were compared and showed that around 60% higher maximum current gain can be achieved by a newsurface passivation layer with low interface trap density that consists of PECVD oxide followed by post-deposition oxide anneal in N2O ambient. This surface passivation along with doublezone JTE were used for fabrication of high power BJTs that result in successful demonstration of 2800 V breakdown voltage for small area (0.3 × 0.3 mm) and large area (1.8 × 1.8 mm) BJTs with a maximum dc current gain of 55 and 52, respectively. The small area BJT showed RON = 4mΩcm2, while for the large are BJT RON = 6.8 mΩcm2. Finally, a Darlington transistor with a maximum current gain of 2900 at room temperature and 640 at 200 °C is reported. The high current gain of the Darlington transistor is achieved by optimum design for the ratio of the active area of the driver BJT to the output BJT.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology , 2011. , xv, 79 p.
Series
Trita-ICT/MAP AVH, ISSN 1653-7610 ; 2011:01
National Category
Electrical Engineering, Electronic Engineering, Information Engineering Other Engineering and Technologies not elsewhere specified
Identifiers
URN: urn:nbn:se:kth:diva-29726ISBN: 978-91-7415-861-8 (print)OAI: oai:DiVA.org:kth-29726DiVA: diva2:397293
Public defence
2011-03-04, Sal C1, KTH-Electrum, Isafjordsgatan 22, Kista, 10:00 (English)
Opponent
Supervisors
Note
QC 20110216Available from: 2011-02-16 Created: 2011-02-14 Last updated: 2011-02-16Bibliographically approved
List of papers
1. Fabrication of 2700-v 12-m Omega center dot cm(2) non ion-implanted 4H-SiC BJTs with common-emitter current gain of 50
Open this publication in new window or tab >>Fabrication of 2700-v 12-m Omega center dot cm(2) non ion-implanted 4H-SiC BJTs with common-emitter current gain of 50
Show others...
2008 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 29, no 10, 1135-1137 p.Article in journal (Refereed) Published
Abstract [en]

High-voltage blocking (2.7-kV) implantation-free SiC bipolar junction transistors with low ON-state resistance (12 m Omega . cm(2)) and high common-emitter current gain of 50 have been fabricated. A graded-base doping was implemented to provide a low-resistive ohmic contact to the epitaxial base. This design features a fully depleted base layer close to the breakdown voltage providing an efficient epitaxial JTE without ion implantation. Eliminating all ion implantation steps in this approach is beneficial for avoiding high-temperature dopant activation annealing and for avoiding generation of lifetime-killing defects that reduce the current gain.

Keyword
bipolar junction transistors (BJTs), power transistors, silicon carbide, bipolar junction transistors, layer
Identifiers
urn:nbn:se:kth:diva-17872 (URN)10.1109/led.2008.2004419 (DOI)000259812900016 ()2-s2.0-54849362500 (Scopus ID)
Note
QC 20100525Available from: 2010-08-05 Created: 2010-08-05 Last updated: 2017-12-12Bibliographically approved
2. High-Voltage 4H-SiC PiN Diodes With Etched Junction Termination Extension
Open this publication in new window or tab >>High-Voltage 4H-SiC PiN Diodes With Etched Junction Termination Extension
Show others...
2009 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 30, no 11, 1170-1172 p.Article in journal (Refereed) Published
Abstract [en]

Implantation-free mesa-etched 4H-SiC PiN diodes with a near-ideal breakdown voltage of 4.3 kV (about 80% of the theoretical value) were fabricated, measured, and analyzed by device simulation and optical imaging measurements at breakdown. The key step in achieving a high breakdown voltage is a controlled etching into the epitaxially grown p-doped anode layer to reach an optimum dopant dose of similar to 1.2 x 10(13) cm(-2) in the junction termination extension (JTE). Electroluminescence revealed a localized avalanche breakdown that is in good agreement with device simulation. A comparison of diodes with single-and double-zone etched JTEs shows a higher breakdown voltage and a less sensitivity to varying processing conditions for diodes with a two-zone JTE.

Keyword
Junction termination extension, PiN diode, 4H-SiC
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-18894 (URN)10.1109/led.2009.2030374 (DOI)000271151500018 ()2-s2.0-70350612871 (Scopus ID)
Note
QC 20100525Available from: 2010-08-05 Created: 2010-08-05 Last updated: 2017-12-12Bibliographically approved
3. High-Current-Gain SiC BJTs With Regrown Extrinsic Base and Etched JTE
Open this publication in new window or tab >>High-Current-Gain SiC BJTs With Regrown Extrinsic Base and Etched JTE
Show others...
2008 (English)In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 55, no 8, 1894-1898 p.Article in journal (Refereed) Published
Abstract [en]

This paper describes successful fabrication of 4H-SiC bipolar junction transistors (BJTs) with a regrown extrinsic base layer and an etched junction termination extension (JTE). Large-area 4H-SiC BJTs measuring 1.8 x 1.8 nun (with an active area of 3.24 mm') showed a common emitter current gain 0 of 42, specific on-resistance Rsp ON of 9 mQ - em', and open-base breakdown voltage BVcEO of-1.75 kV at room temperature. The key to successful fabrication of high-current-gain SiC BJTs with a regrown extrinsic base is efficient removal of the p+ regrown layer from the surface of the emitter-base junction. The BJT with p+ regrown layer has the advantage of lower base contact resistivity and current gain that is less sensitive to the distance between the emitter edge and the base contact, compared to a BJT with ion-implanted base. Fabrication of BJTs without ion implantation means less lifetime-reducing defects, and in addition, the surface morphology is improved since high-temperature annealing becomes unnecessary. BJTs with flat-surface junction termination that combine etched regrown layers show about 250 V higher breakdown voltage than BJTs; with only etched flat-surface JTE.

Keyword
base regrowth, bipolar junction transistors (BJTs), junction, termination extension (JTE), 4H-silicon carbide, 4h-sic bjts
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-17721 (URN)10.1109/ted.2008.926645 (DOI)000257950300018 ()2-s2.0-49249108274 (Scopus ID)
Note
QC 20100525Available from: 2010-08-05 Created: 2010-08-05 Last updated: 2017-12-12Bibliographically approved
4. Surface-passivation effects on the performance of 4H-SiC BJTs
Open this publication in new window or tab >>Surface-passivation effects on the performance of 4H-SiC BJTs
Show others...
2011 (English)In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 58, 259-265 p.Article in journal (Refereed) Published
Abstract [en]

In this brief, the electrical performance in terms of maximum current gain and breakdown voltage is compared experimentally and by device simulation for 4H-SiC BJTs passivated with different surface-passivation layers. Variation in bipolar junction transistor (BJT) performance has been correlated to densities of interface traps and fixed oxide charge, as evaluated through MOS capacitors. Six different methods were used to fabricate SiO2 surface passivation on BJT samples from the same wafer. The highest current gain was obtained for plasma-deposited SiO2 which was annealed in N2O ambient at 1100 °C for 3 h. Variations in breakdown voltage for different surface passivations were also found, and this was attributed to differences in fixed oxide charge that can affect the optimum dose of the high-voltage junction-termination extension (JTE). The dependence of breakdown voltage on the dose was also evaluated through nonimplanted BJTs with etched JTE.

Keyword
Bipolar junction transistor; Breakdown voltage; Current gains; Device simulations; Electrical performance; High-voltages; Interface traps; Oxide charge; Passivation effect; Passivation layer; power transistor; Surface passivation, Electric breakdown; MOS capacitors; Passivation; Power electronics; Silicon carbide; Silicon oxides; Silicon wafers; Tunnel diodes, Bipolar transistors
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-29778 (URN)10.1109/TED.2010.2082712 (DOI)000285840100034 ()2-s2.0-78650871047 (Scopus ID)
Note
QC 20110215Available from: 2011-02-15 Created: 2011-02-15 Last updated: 2017-12-11Bibliographically approved
5. Removal of Crystal Orientation Effects on the Current Gain of 4H-SiC BJTs Using Surface Passivation
Open this publication in new window or tab >>Removal of Crystal Orientation Effects on the Current Gain of 4H-SiC BJTs Using Surface Passivation
Show others...
2011 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 32, no 5, 596-598 p.Article in journal (Refereed) Published
Abstract [en]

In this letter, the dependence of current gain and base resistance on crystal orientations for single-finger 4H-SiC bipolar junction transistors ( BJTs) is analyzed. Statistical evaluation techniques were also applied to study the effect of surface passivation and mobility on the performance of the devices. It is shown that BJTs with an emitter edge aligned to the [1 (2) under bar 10] direction shows a lower current gain before surface passivation and higher base resistance after contact formation compared with other investigated crystal directions. However, the devices show a similar current gain independent of the crystal orientation after surface passivation.

Place, publisher, year, edition, pages
IEEE, 2011
Keyword
Bipolar junction transistors (BJTs), crystal orientation, silicon carbide
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-29779 (URN)10.1109/LED.2011.2117412 (DOI)000289908500006 ()2-s2.0-79955545058 (Scopus ID)
Note

QC 20110215

Available from: 2011-02-15 Created: 2011-02-15 Last updated: 2017-12-11Bibliographically approved
6. High Voltage (2.8 kV) Implantation-free 4H-SiC BJTs with Long-TermStability of the Current Gain
Open this publication in new window or tab >>High Voltage (2.8 kV) Implantation-free 4H-SiC BJTs with Long-TermStability of the Current Gain
Show others...
2011 (English)In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 58, no 8, 2665-2669 p.Article in journal (Refereed) Published
Abstract [en]

In this work, implantation-free 4H-SiC BJTs with high breakdown of 2800 V have been fabricated utilizing acontrolled two-step etched junction termination extension (JTE). The small area devices show a maximum dc current gainof 55 at Ic=0.33 A (JC=825 A/cm2) and VCESAT = 1.05 V at Ic = 0.107 A that corresponds to a low ON-resistance of 4mΩ·cm2. The large area device have a maximum dc current gain of 52 at Ic = 9.36 A (JC=289 A/cm2) and VCESAT = 1.14 Vat Ic = 5 A that corresponds to an ON-resistance of 6.8 mΩ·cm2. Also these devices demonstrate a negative temperaturecoefficient of the current gain (β=26 at 200°C) and a positive temperature coefficient of the ON-resistance (RON = 10.2mΩ·cm2 at 200°C). The small area BJT shows no bipolar degradation and low current gain degradation after 150 Hrs stressof the base-emitter diode with current level of 0.2A (JE=500 A/cm2). Also, large area BJT shows a VCE fall time of 18 nsduring turn-on and a VCE rise time of 10 ns during turn-off for 400 V switching characteristics.

Keyword
Bipolar junction transistors (BJT), power transistor, silicon carbide
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-29780 (URN)10.1109/TED.2011.2154332 (DOI)000293708500059 ()2-s2.0-79960843602 (Scopus ID)
Note
Updated from submitted to published.Available from: 2011-02-15 Created: 2011-02-15 Last updated: 2017-12-11Bibliographically approved
7. High-Current-Gain SiC BJTs With Regrown Extrinsic Base and Etched JTE
Open this publication in new window or tab >>High-Current-Gain SiC BJTs With Regrown Extrinsic Base and Etched JTE
Show others...
2008 (English)In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 55, no 8, 1894-1898 p.Article in journal (Refereed) Published
Abstract [en]

This paper describes successful fabrication of 4H-SiC bipolar junction transistors (BJTs) with a regrown extrinsic base layer and an etched junction termination extension (JTE). Large-area 4H-SiC BJTs measuring 1.8 x 1.8 nun (with an active area of 3.24 mm') showed a common emitter current gain 0 of 42, specific on-resistance Rsp ON of 9 mQ - em', and open-base breakdown voltage BVcEO of-1.75 kV at room temperature. The key to successful fabrication of high-current-gain SiC BJTs with a regrown extrinsic base is efficient removal of the p+ regrown layer from the surface of the emitter-base junction. The BJT with p+ regrown layer has the advantage of lower base contact resistivity and current gain that is less sensitive to the distance between the emitter edge and the base contact, compared to a BJT with ion-implanted base. Fabrication of BJTs without ion implantation means less lifetime-reducing defects, and in addition, the surface morphology is improved since high-temperature annealing becomes unnecessary. BJTs with flat-surface junction termination that combine etched regrown layers show about 250 V higher breakdown voltage than BJTs; with only etched flat-surface JTE.

Keyword
base regrowth, bipolar junction transistors (BJTs), junction, termination extension (JTE), 4H-silicon carbide, 4h-sic bjts
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-17721 (URN)10.1109/ted.2008.926645 (DOI)000257950300018 ()2-s2.0-49249108274 (Scopus ID)
Note
QC 20100525Available from: 2010-08-05 Created: 2010-08-05 Last updated: 2017-12-12Bibliographically approved

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