Fabrication Technology for Efficient High Power Silicon Carbide Bipolar Junction Transistors
2011 (English)Doctoral thesis, comprehensive summary (Other academic)
The superior characteristics of Silicon Carbide as a wide band gap semiconductor have motivated many industrial and non-industrial research groups to consider SiC for the next generations of high power semiconductor devices. The SiC Bipolar Junction Transistor (BJT) is one candidate for high power applications due to its low on-state power loss and fast switching capability. However, to compete with other switching devices such as Field Effect Transistors (FETs) or IGBTs, it is necessary for a power SiC BJT to provide a high current gain to reduce the power required from the drive circuit. In this thesis implantation free 4H-SiC BJTs with linearly graded base layer have been demonstrated with common-emitter current gain of 50 and open-base breakdown voltage of 2700 V. Also an efficient junction termination extension (JTE) with 80% of theoretical parallel-plane breakdown voltage was analyzed by fabrication of high voltage PiN diodes to achieve an optimum dose of remaining JTE charge. Surface passivation of 4H-SiC BJT is an essential factor for efficient power BJTs. Therefore different passivation techniques were compared and showed that around 60% higher maximum current gain can be achieved by a newsurface passivation layer with low interface trap density that consists of PECVD oxide followed by post-deposition oxide anneal in N2O ambient. This surface passivation along with doublezone JTE were used for fabrication of high power BJTs that result in successful demonstration of 2800 V breakdown voltage for small area (0.3 × 0.3 mm) and large area (1.8 × 1.8 mm) BJTs with a maximum dc current gain of 55 and 52, respectively. The small area BJT showed RON = 4mΩcm2, while for the large are BJT RON = 6.8 mΩcm2. Finally, a Darlington transistor with a maximum current gain of 2900 at room temperature and 640 at 200 °C is reported. The high current gain of the Darlington transistor is achieved by optimum design for the ratio of the active area of the driver BJT to the output BJT.
Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology , 2011. , xv, 79 p.
Trita-ICT/MAP AVH, ISSN 1653-7610 ; 2011:01
Electrical Engineering, Electronic Engineering, Information Engineering Other Engineering and Technologies not elsewhere specified
IdentifiersURN: urn:nbn:se:kth:diva-29726ISBN: 978-91-7415-861-8OAI: oai:DiVA.org:kth-29726DiVA: diva2:397293
2011-03-04, Sal C1, KTH-Electrum, Isafjordsgatan 22, Kista, 10:00 (English)
Agarwal, Anant, Dr.
Domeij, Martin, Docent
QC 201102162011-02-162011-02-142011-02-16Bibliographically approved
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