Surface-passivation effects on the performance of 4H-SiC BJTs
2011 (English)In: IEEE Transactions on Electron Devices, ISSN 0018-9383, Vol. 58, 259-265 p.Article in journal (Refereed) Published
In this brief, the electrical performance in terms of maximum current gain and breakdown voltage is compared experimentally and by device simulation for 4H-SiC BJTs passivated with different surface-passivation layers. Variation in bipolar junction transistor (BJT) performance has been correlated to densities of interface traps and fixed oxide charge, as evaluated through MOS capacitors. Six different methods were used to fabricate SiO2 surface passivation on BJT samples from the same wafer. The highest current gain was obtained for plasma-deposited SiO2 which was annealed in N2O ambient at 1100 Â°C for 3 h. Variations in breakdown voltage for different surface passivations were also found, and this was attributed to differences in fixed oxide charge that can affect the optimum dose of the high-voltage junction-termination extension (JTE). The dependence of breakdown voltage on the dose was also evaluated through nonimplanted BJTs with etched JTE.
Place, publisher, year, edition, pages
2011. Vol. 58, 259-265 p.
Bipolar junction transistor; Breakdown voltage; Current gains; Device simulations; Electrical performance; High-voltages; Interface traps; Oxide charge; Passivation effect; Passivation layer; power transistor; Surface passivation, Electric breakdown; MOS capacitors; Passivation; Power electronics; Silicon carbide; Silicon oxides; Silicon wafers; Tunnel diodes, Bipolar transistors
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-29778DOI: 10.1109/TED.2010.2082712ISI: 000285840100034ScopusID: 2-s2.0-78650871047OAI: oai:DiVA.org:kth-29778DiVA: diva2:397724
QC 201102152011-02-152011-02-152011-04-15Bibliographically approved