WiMAX/LTE Receiver Front-End in 90nm CMOS
2009 (English)In: ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, NEW YORK: IEEE , 2009, 1036-1039 p.Conference paper (Refereed)
RFIC design using low-voltage nanometer CMOS technologies offers both advantages and challenges. This paper describes the limitations of using these technologies in receiver front-end design and proposes circuit solutions. Several techniques such as wideband noise reduction, inductoreless peaking, passive mixing, and low flicker noise amplification are reviewed and employed. A receiver front-end that covers 700MHz-6Ghz and supports the WiMAX/LTE standards is designed based on these circuit solutions. The front-end is designed using 1.2V 90nm CMOS and consumes a total power of 10.2mW. The total gain is 32dB, noise figure is 4dB, flicker noise corner is 10kHz, and third order intercept point is -10dBm/0dBm.
Place, publisher, year, edition, pages
NEW YORK: IEEE , 2009. 1036-1039 p.
90nm CMOS, Circuit solution, Flicker noise, Low flicker noise, Low-voltage, Nanometer CMOS, Passive mixing, Receiver front-ends, RFIC design, Third order intercept points, Total power, Wideband noise, Broadband amplifiers, Mixer circuits, Spurious signal noise
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-29912DOI: 10.1109/ISCAS.2009.5117936ISI: 000275929800267ScopusID: 2-s2.0-70350168320ISBN: 978-1-4244-3827-3OAI: oai:DiVA.org:kth-29912DiVA: diva2:398594
IEEE International Symposium on Circuits and Systems (ISCAS 2009), Taipei, TAIWAN, MAY 24-27, 2009
QC 201102182011-02-182011-02-172011-02-18Bibliographically approved