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Experimental evaluation of different passivation layers on the performance of 3kV 4H-SiC BJTs
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
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2010 (English)In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 645-648, no Part 1-2, 661-664 p.Article in journal (Refereed) Published
Abstract [en]

In this work, the electrical performance in terms of maximum current gain, ON-resistance and blocking capability has been compared for 4H-SiC BJTs passivated with different surface passivation layers. Variation in BJT performance has been correlated to densities of interface traps and fixed oxide charge, as evaluated through MOS capacitors. Six different methods were used to fabricate SiO2 surface passivation on BJT samples from the same wafer. The highest current gain was obtained for PECVD deposited SiO2 which was annealed in N2O ambient at 1100 degrees C during 3 hours. Variations in breakdown voltage for different surface passivations were also found, and this is attributed to differences in fixed oxide charge that can affect the optimum dose of the high voltage JTE termination.

Place, publisher, year, edition, pages
2010. Vol. 645-648, no Part 1-2, 661-664 p.
Keyword [en]
Surface passivation, Bipolar Junction Transistors (BJT), 4H-SiC
National Category
Materials Engineering
Identifiers
URN: urn:nbn:se:kth:diva-29663DOI: 10.4028/www.scientific.net/MSF.645-648.661ISI: 000279657600156Scopus ID: 2-s2.0-77955451934OAI: oai:DiVA.org:kth-29663DiVA: diva2:401844
Note

QC 20110304

Available from: 2011-03-04 Created: 2011-02-11 Last updated: 2017-12-11Bibliographically approved

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Zetterling, Carl -Mikael

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