A General Approach to High-Level Energy and Performance Estimation in SoCs
2009 (English)In: 22ND INTERNATIONAL CONFERENCE ON VLSI DESIGN HELD JOINTLY WITH 8TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, PROCEEDINGS , 2009, 200-205 p.Conference paper (Refereed)
We present a high-level methodology for efficient and accurate estimation of energy and performance in SoCs at Functional Untimed Level. We then validate the proposed method against gate level for accuracy and against TLM-PV for speed. We show that the method is within 15% of gate-level accuracy and in aver-age 28x faster than TLM-PV, for the benchmark applications selected.
Place, publisher, year, edition, pages
2009. 200-205 p.
, International Conference on VLSI Design, Proceedings, ISSN 1063-9667
Benchmarking, Integrated circuits, Accurate estimations, Benchmark applications, Gate levels, General approaches, Performance estimations
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-31219DOI: 10.1109/VLSI.Design.2009.25ISI: 000264822300034ISBN: 978-0-7695-3506-7OAI: oai:DiVA.org:kth-31219DiVA: diva2:405990
22nd International Conference on VLSI Design held with 8th International Conference on Embedded Systems, New Delhi, INDIA, JAN 05-09, 2009
QC 201103242011-03-242011-03-112011-03-24Bibliographically approved