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RF Transmitter Architecture Investigation for Power Efficient Mobile WiMAX Applications
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
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2008 (English)In: 2008 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS / [ed] Nurmi J, Takala J, Vainio O, NEW YORK: IEEE , 2008, 114-117 p.Conference paper (Refereed)
Abstract [en]

Wireless broadband digital communication systems with high spectral efficiency suffer from severe power efficiency problem. Peak-to-Average Power Ratio is reported up to 12dB for WiMAX 802.16e systems implementing OFDM IFFT-1024 and 64-QAM modulation. In this work, outphasing (LILAC) and polar transmitter architectures are investigated and compared with direct conversion (DC) architecture. Complete system solution targeting 23dBm output power is evaluated. System level simulation result shows that, with linear power combiner, LILAC consumes more power than DC if non-clipping modulation scheme used. And polar system has stringent 3 degree phase matching and 0.5dB gain matching requirements to meet EVM and spectrum mask specifications.

Place, publisher, year, edition, pages
NEW YORK: IEEE , 2008. 114-117 p.
National Category
Electrical Engineering, Electronic Engineering, Information Engineering Computer and Information Science
URN: urn:nbn:se:kth:diva-31542DOI: 10.1109/ISSOC.2008.4694883ISI: 000262647700026ScopusID: 2-s2.0-67249124570ISBN: 978-1-4244-2541-9OAI: diva2:408562
10th Annual International Symposium on System-on-Chip Tampere, FINLAND, 2008
QC 20110405Available from: 2011-04-05 Created: 2011-03-18 Last updated: 2013-01-29Bibliographically approved
In thesis
1. All Digital Polar Transmitter Design for Software Defined Radio: Architecture and Low Power Circuit Implementation
Open this publication in new window or tab >>All Digital Polar Transmitter Design for Software Defined Radio: Architecture and Low Power Circuit Implementation
2012 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The evolving wireless communication technology is aiming highdata rate, high mobility, long distance and at the meantime, co-existwith various different standards. This developing trend requires ahighly linear transceiver system and it causes the problem of lowefficiency due to the large crest factor of signals. On the other hand,with process scaling, digital blocks are occupying more functions andchip area than before, to fully utilize the digital process low poweradvantage and save design cost, hardware reuse is preferable. Theconcept of Software Defined Radio (SDR) is raised to make thesystem more adaptable to multiple communication standards withminimal hardware resources.

In this doctoral dissertation work, the software defined radioarchitecture especially the all-digital polar transmitter architecture isexplored. System level comparison on different transmitter topologiesis carried out in the first place. Direct conversion, out-phasing andpolar transmitter topologies are compared. Based on the system levelevaluation, a Lowpass Sigma Delta Modulation (LPSDM) digitalpolar transmitter is designed under 90nm CMOS process andpackaged in QFN32. 19.3% peak efficiency and 11.4dBm outputpower is measured under single 1.0V supply. The constellationmeasurement achieved 5.08% for 3pi/8PSK modulation and 7.01%for QAM16 modulation output. The measurement on the packagedtransmitter AM/AM and AM/PM also demonstrated the linearity andpower efficiency performance under low voltage environment. This verified the possibility for a fully SDR solution in the future.

As a specific application and genuine creation, the UHF RFIDstandard is mapped into digital polar transmitter architecture. System level simulation is performed and transient signal parameters areextracted. To prove the SDR possibility, the system is fully designedby VHDL language and downloaded into FPGA hardware with highspeed serial port. The measured results confirm the possibility of thedigital polar transmitter architecture potential in SDR systemrealization.

Based on the design and verification of two different systems, themethodology for digital implementation of linear transmitter systemis developed and the skill to carry out optimization and measurementis also possessed. In conclusion, the academic publication andverification proved the feasibility of digital polar transmitterapplication in linear system and point out the direction for a fullySDR realization.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2012. xviii, 96, 13, 17 p.
Trita-ICT-ECS AVH, ISSN 1653-6363 ; 12:10
Switching Power Amplifier, All Digital Polar Transmitter, Lowpass Sigma Delta Modulation, Software Defined Radio, RFID, H-Bridge Architecture, Resonating, Filter Matching Network.
National Category
Computer Systems
Research subject
urn:nbn:se:kth:diva-116861 (URN)978-91-7501-614-6 (ISBN)
Public defence
2013-02-22, Forum Sal-D, Isafjordsgatan 39, Kista, 09:00 (English)

QC 20130129

Available from: 2013-01-29 Created: 2013-01-28 Last updated: 2013-01-29Bibliographically approved

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