An IIP2 Digital Calibration Technique for Passive CMOS Down-Converters
2010 (English)In: IEEE INT SYMP CIRC SYST PROC, New York: IEEE , 2010, 825-828 p.Conference paper (Refereed)
The IIP2 requirement in fully integrated direct-conversion receivers using FDD duplexing is prohibitively high and demands the use of an external filter in order to attenuate the leakage from the transmitter. This paper presents a digital calibration technique for passive CMOS down-converters that allows a direct conversion receiver achieve the requirements without external filtering. A Least-Mean-Square optimization algorithm is used in order to reduce the low-frequency second-order intermodulation product. The algorithm controls the digital calibration structures at the biasing of the passive mixer and adapts them until the second order intermodulation drops below the noise level. The method is tested by calibrating a 1.2-V 65nm CMOS passive mixer targeting UMTS/LTE applications at several corner conditions including worst case mismatches in the switching pairs.
Place, publisher, year, edition, pages
New York: IEEE , 2010. 825-828 p.
, IEEE International Symposium on Circuits and Systems, ISSN 0271-4302
Fabrics; Intermodulation; Millimeter wave devices; Mixers (machinery); Signal receivers
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-32138DOI: 10.1109/ISCAS.2010.5537437ISI: 000287216001017ScopusID: 2-s2.0-77955995727ISBN: 978-1-4244-5309-2OAI: oai:DiVA.org:kth-32138DiVA: diva2:409274
International Symposium on Circuits and Systems Nano-Bio Circuit Fabrics and Systems (ISCAS 2010)
QC 201104072011-04-072011-04-072012-03-20Bibliographically approved