Ultra-low power 2.4 GHz CMOS receiver front-end for sensor nodes
2007 (English)In: 2007 European Conference On Circuit Theory And Design: Vols 1-3, 2007, 595-598 p.Conference paper (Refereed)
This paper presents a fully integrated receiver front-end for a 2.4GHz RF transceiver. A system level design for the radio front end for which these components are designed is also presented. The proposed receiver front end (Low-Noise Amplifier, Single-to-Differential Converter and Mixer) is based on a direct conversion architecture designed in 0.18 mu m CMOS technology. It takes advantage of on-chip single to differential signal conversion to avoid the use of cost intensive off-chip balun and external passives. The post layout simulations of front end show that the RF front-end achieves a voltage gain of 8dB without the baseband amplifier, a noise figure of 8.9 dB and IIP3 better than -15 dBm. The flicker noise corner is less than 10 KHz, with a nominal DC offset. It consumes less than 1.6 mA from a 1.8V supply.
Place, publisher, year, edition, pages
2007. 595-598 p.
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-39614DOI: 10.1109/ECCTD.2007.4529666ISI: 000258708400146ScopusID: 2-s2.0-49749153434OAI: oai:DiVA.org:kth-39614DiVA: diva2:441728
European Conference on Circuit Theory and Design 2007, ECCTD 2007; Seville; 26 August 2007 through 30 August 2007