Power management and clock generator for a novel passive UWB tag
2007 (English)In: 2007 International Symposium On System-On-Chip Proceedings / [ed] Nurmi, J; Takala, J; Vainio, O, 2007, 82-85 p.Conference paper (Refereed)
In this paper we present a power management and a clock generator for a novel passive UWB tag. It can be used in many applications such as Radio Frequency Identification (RFID), and ubiquitous wireless sensing. As same as conventional RFID, the tag captures the power from the incoming RF signal, converts to DC and stores it in a relatively big capacitor. A voltage sensor and a regulator provide stable voltage for the whole circuitry during operation mode. A clock circuitry generates a low jitter and low skew clock for ultra wideband transmitter to transmit data. In such passive system the power consumption of each block should be as low as possible. On the other hand, performance degradation across process, voltage, and temperature variation (PVT) is another problematic challenge in low power and low cost circuit implementation. In this work, the power management unit including of an RF power scavenging, a voltage sensor, a low drop out regulator and a clock generator are designed and their performance across PVT variation are analyzed. The module is designed and is fabricated in CMOS 0.18 mu m technology.
Place, publisher, year, edition, pages
2007. 82-85 p.
IdentifiersURN: urn:nbn:se:kth:diva-41144ISI: 000253090400020ScopusID: 2-s2.0-48049106688ISBN: 978-1-4244-1367-6OAI: oai:DiVA.org:kth-41144DiVA: diva2:443471
2007 International Symposium on System-on-Chip, SOC; Tampere; 20 November 2007 through 21 November 2007