Change search
ReferencesLink to record
Permanent link

Direct link
Debugging Software for Multi-core Systems
KTH, School of Information and Communication Technology (ICT).
2011 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

The world of computer science has seen a big change the last years. The physical limitations in just increasing frequency when trying to increase the speed in processors has lead to a new era - multi-core. Systems based on multi-core processors brings a much higher level of flexibility to the designer, possibilities to experiment with different frequencies and voltages on on single chip. Unfortunately this flexibility also leads to a more complex system, hard to monitor and debug. The software implemented in multi-core processors needs to be parallelized and distributed very efficiently to take advantage of the architecture of the processor. The way information is exchanged between units in the processors and how the complex memory architecture, often with several levels of cache, is accessed are essential factors for the performance. It is often the case that minor changes in the software lead to big differences in performance.

To be able to analyze the software when it is running on the chip it is of utmost importance to have a system that monitor the chip. One drawback with multi-core processors is that the integration of more logic into one chip decreases the external observability of the system. Hardware manufacturers have been trying to develop solutions for this problem and nowadays many processors come with an integrated system with the only purpose to support debugging and monitoring of the chip. The debugging system can be seen as a separate layer integrated on top of the system, only running in the background without affecting the the target system. In the hunt for higher performance and at the same time higher visibility this solution can be of big interest for software tool vendors and software designers.

This master thesis is divided into two parts where the first one gives an overview of the concept with multi-core processors and problems with developing efficient software for them. It also addresses why a hardware based debugging and analyzing system can be beneficial during software development. In the second part a design is developed for a hardware based debugging system, implemented in a state of the art multi-core processor from Freescale. The parallel software running on the multicore processor is executed on top of Enea’s real time operating system OSE.

Place, publisher, year, edition, pages
2011. , 79 p.
Trita-ICT-EX, 109
National Category
Engineering and Technology
URN: urn:nbn:se:kth:diva-42441OAI: diva2:447015
Subject / course
Electronic- and Computer Systems
Educational program
Master of Science - System-on-Chip Design
Available from: 2011-10-10 Created: 2011-10-10 Last updated: 2011-10-10Bibliographically approved

Open Access in DiVA

fulltext(3341 kB)941 downloads
File information
File name FULLTEXT01.pdfFile size 3341 kBChecksum SHA-512
Type fulltextMimetype application/pdf

By organisation
School of Information and Communication Technology (ICT)
Engineering and Technology

Search outside of DiVA

GoogleGoogle Scholar
Total: 941 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

Total: 1021 hits
ReferencesLink to record
Permanent link

Direct link