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A Si/SiGe MOSFET utilizing low-temperature wafer bonding
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2005 (English)In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 78-79, 244-247 p.Article in journal (Refereed) Published
Abstract [en]

A process scheme for the fabrication of a low temperature SiGe V-groove MOSFET is demonstrated. The transfer and output characteristics show promising results for the device performance. The source/drain resistance and the quality of the gate insulator/SiGe channel must be optimized for device operation improvement.

Place, publisher, year, edition, pages
2005. Vol. 78-79, 244-247 p.
Keyword [en]
wafer bonding, SiGe MOSFET, GIDL effect
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-42607DOI: 10.1016/j.mee.2004.12.034ISI: 000228589700042Scopus ID: 2-s2.0-14944353078OAI: oai:DiVA.org:kth-42607DiVA: diva2:447585
Note
QC 20111012. 0th International Conference on Micro and Nano Engineering. Rotterdam, NETHERLANDS. SEP 19-22, 2004Available from: 2011-10-12 Created: 2011-10-11 Last updated: 2017-12-08Bibliographically approved

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