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A circuit-switched network architecture for network-on-chip
KTH, Superseded Departments, Electronic Systems Design.
KTH, Superseded Departments, Electronic Systems Design.
KTH, Superseded Departments, Electronic Systems Design.
2004 (English)In: IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, NEW YORK: IEEE , 2004, 55-58 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a circuit-switched network architecture for Network-on-Chip. It uses time-division-multiplexing (TDM) scheme to realize the circuits. The global routing (slot assignment) is done centrally, while the slot mapping is done locally by the switches. The switches support multicast operation, which enables multicast traffic. Furthermore, the delay in the network is predictable before a circuit is established and in-order data delivery is guaranteed.

Place, publisher, year, edition, pages
NEW YORK: IEEE , 2004. 55-58 p.
Series
IEEE International SOC Conference
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-44016DOI: 10.1109/SOCC.2004.1362349ISI: 000224551900011Scopus ID: 2-s2.0-14844293117ISBN: 0-7803-8445-8 (print)OAI: oai:DiVA.org:kth-44016DiVA: diva2:449026
Conference
IEEE Systems-on-Chips Conference. Santa Clara, CA. SEP 12-15, 2004
Note
QC 20111019Available from: 2011-10-19 Created: 2011-10-19 Last updated: 2012-02-14Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
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  • modern-language-association-8th-edition
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More styles
Language
  • de-DE
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  • nn-NO
  • nn-NB
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  • Other locale
More languages
Output format
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  • asciidoc
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