A low power strategy for future mobile terminals
2004 (English)In: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, LOS ALAMITOS: IEEE COMPUTER SOC , 2004, 702-703 p.Conference paper (Refereed)
In this paper we have investigated the efficiency of two power-saving strategies that reduces both static and dynamic power consumption when applied to a chip-multiprocessor (CMP). They are evaluated under two workload scenarios and compared against a conventional uni-processor architecture and a CMP without any power-aware scheduling. The results show that energy due to static and dynamic power consumption can be reduced by, up to 78% and that further 8% energy can be saved at the expense of response-time of non-critical applications. Furthermore, a small study on the potential impact of system-level events showed that system calls can contribute significantly to the total energy consumed.
Place, publisher, year, edition, pages
LOS ALAMITOS: IEEE COMPUTER SOC , 2004. 702-703 p.
, DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS
mobile handsets, multiprocessing systems, power consumption
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-44009DOI: 10.1109/DATE.2004.1268938ISI: 000189434000121ScopusID: 2-s2.0-3042561707ISBN: 0-7695-2085-5OAI: oai:DiVA.org:kth-44009DiVA: diva2:449080
Design, Automation and Test in Europe Conference and Exhibition (DATE 04). Paris, FRANCE. FEB 16-20, 2004
QC 201110192011-10-192011-10-192011-10-19Bibliographically approved