On-chip versus off-chip passives analysis in radio and mixed-signal system-on-package design
2004 (English)In: PROCEEDINGS OF THE SIXTH IEEE CPMT CONFERENCE ON HIGH DENSITY MICROSYSTEM DESIGN AND PACKAGING AND COMPONENT FAILURE ANALYSIS (HDP'04), NEW YORK: IEEE , 2004, 109-116 p.Conference paper (Refereed)
Advances of VLSI and packaging technologies enable condensed integration of system level functions in a single module, known as SoC and SoP. In order to find a better solution between SoC and SoP, and eliminate constraints between chip and package, a complete solution is needed to co-design and co-optimize chip and package in a total design plan with precise trade-offs of on-chip versus off-chip passives. In this paper, we present a complete and systematic design methodology for RF SoP/SoC. This methodology includes early analysis and design implementation. This early analysis is to estimate the performance and cost of each solution quickly and quantitively. Then, the best solution is found and implemented. For a better presentation, the method and design techniques are demonstrated through the design of a common emitter low noise amplifier (LNA) for 5GHz wireless LAN (local area network). Analytical equations of noise figure and transducer gain for the LNA with lossy package are also developed.
Place, publisher, year, edition, pages
NEW YORK: IEEE , 2004. 109-116 p.
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-44728ISI: 000224594800021ScopusID: 2-s2.0-14844291557ISBN: 0-7803-8620-5OAI: oai:DiVA.org:kth-44728DiVA: diva2:451523
6th IEEE CPMT Conference on High Density Microsystem Design and Packaging and Component Failure Analysis (HDP 04) Location: Shanghai, PEOPLES R CHINA Date: JUN 30-JUL 03, 2004
QC 201110262011-10-262011-10-252012-02-14Bibliographically approved