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Synthesis of Binary Machines
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0001-7382-9408
2011 (English)In: IEEE Transactions on Information Theory, ISSN 0018-9448, E-ISSN 1557-9654, Vol. 57, no 10, 6890-6893 p.Article in journal (Refereed) Published
Abstract [en]

The problem of constructing a binary machine with the minimum number of stages generating a given binary sequence is addressed. Binary machines are a generalization of nonlinear feedback shift registers (NLFSRs) in which both connections, feedback and feedforward, are allowed and no chain connection between the register stages is required. An algorithm for constructing a shortest binary machine generating a given periodic binary sequence is presented.

Place, publisher, year, edition, pages
2011. Vol. 57, no 10, 6890-6893 p.
Keyword [en]
Feedback shift register (FSR), nonlinear complexity, sequences
National Category
Computer and Information Science
Identifiers
URN: urn:nbn:se:kth:diva-45588DOI: 10.1109/TIT.2011.2149495ISI: 000295739000041Scopus ID: 2-s2.0-80053958871OAI: oai:DiVA.org:kth-45588DiVA: diva2:454271
Funder
Swedish Research Council, 621-2010-4388
Note
QC 20111107Available from: 2011-11-07 Created: 2011-10-31 Last updated: 2017-12-08Bibliographically approved

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Dubrova, Elena

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