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A polar transmitter architecture with digital switching amplifier for UHF RFID applications
KTH, School of Information and Communication Technology (ICT), Electronic Systems. (iPack)
KTH, School of Information and Communication Technology (ICT), Electronic Systems. (iPack)
2011 (English)In: 5th Annual IEEE International Conference on RFID, IEEE , 2011, 1-6 p.Conference paper, Published paper (Refereed)
Abstract [en]

With amplitude shift keying (ASK) modulation and signal envelope rising falling edge slope requirements, the efficiency of UHF RFID system can be improved by using polar transmitter architecture than using linear power amplifiers. In this work, to ensure maximum integration and meet EPC Class-1 Generation-2 specification, an all digital polar transmitter is proposed and verified by transient signal analysis and random pattern simulation. The timing and signal quality constraints of the digital polar transmitter circuits are extracted. Due to the use of RF frequency low pass sigma delta modulation, the system can be designed in pure digital process without on-chip inductive components. Compared to the 31% theoretical efficiency by using class-A linear power amplifier, a minimum 77% theoretical efficiency can be achieved in this proposed digital RFID system.

Place, publisher, year, edition, pages
IEEE , 2011. 1-6 p.
Keyword [en]
UHF RFID, RF sigma delta modulation, all digital polar transmitter, inductance less all digital process
National Category
Telecommunications
Identifiers
URN: urn:nbn:se:kth:diva-49130DOI: 10.1109/RFID.2011.5764612Scopus ID: 2-s2.0-79957437655ISBN: 978-1-4244-9607-5 (print)OAI: oai:DiVA.org:kth-49130DiVA: diva2:459299
Conference
2011 IEEE International Conference on RFID (RFID)
Note
QC 20120109Available from: 2012-01-09 Created: 2011-11-25 Last updated: 2013-01-29Bibliographically approved
In thesis
1. All Digital Polar Transmitter Design for Software Defined Radio: Architecture and Low Power Circuit Implementation
Open this publication in new window or tab >>All Digital Polar Transmitter Design for Software Defined Radio: Architecture and Low Power Circuit Implementation
2012 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The evolving wireless communication technology is aiming highdata rate, high mobility, long distance and at the meantime, co-existwith various different standards. This developing trend requires ahighly linear transceiver system and it causes the problem of lowefficiency due to the large crest factor of signals. On the other hand,with process scaling, digital blocks are occupying more functions andchip area than before, to fully utilize the digital process low poweradvantage and save design cost, hardware reuse is preferable. Theconcept of Software Defined Radio (SDR) is raised to make thesystem more adaptable to multiple communication standards withminimal hardware resources.

In this doctoral dissertation work, the software defined radioarchitecture especially the all-digital polar transmitter architecture isexplored. System level comparison on different transmitter topologiesis carried out in the first place. Direct conversion, out-phasing andpolar transmitter topologies are compared. Based on the system levelevaluation, a Lowpass Sigma Delta Modulation (LPSDM) digitalpolar transmitter is designed under 90nm CMOS process andpackaged in QFN32. 19.3% peak efficiency and 11.4dBm outputpower is measured under single 1.0V supply. The constellationmeasurement achieved 5.08% for 3pi/8PSK modulation and 7.01%for QAM16 modulation output. The measurement on the packagedtransmitter AM/AM and AM/PM also demonstrated the linearity andpower efficiency performance under low voltage environment. This verified the possibility for a fully SDR solution in the future.

As a specific application and genuine creation, the UHF RFIDstandard is mapped into digital polar transmitter architecture. System level simulation is performed and transient signal parameters areextracted. To prove the SDR possibility, the system is fully designedby VHDL language and downloaded into FPGA hardware with highspeed serial port. The measured results confirm the possibility of thedigital polar transmitter architecture potential in SDR systemrealization.

Based on the design and verification of two different systems, themethodology for digital implementation of linear transmitter systemis developed and the skill to carry out optimization and measurementis also possessed. In conclusion, the academic publication andverification proved the feasibility of digital polar transmitterapplication in linear system and point out the direction for a fullySDR realization.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2012. xviii, 96, 13, 17 p.
Series
Trita-ICT-ECS AVH, ISSN 1653-6363 ; 12:10
Keyword
Switching Power Amplifier, All Digital Polar Transmitter, Lowpass Sigma Delta Modulation, Software Defined Radio, RFID, H-Bridge Architecture, Resonating, Filter Matching Network.
National Category
Computer Systems
Research subject
SRA - ICT
Identifiers
urn:nbn:se:kth:diva-116861 (URN)978-91-7501-614-6 (ISBN)
Public defence
2013-02-22, Forum Sal-D, Isafjordsgatan 39, Kista, 09:00 (English)
Opponent
Supervisors
Projects
iPack
Note

QC 20130129

Available from: 2013-01-29 Created: 2013-01-28 Last updated: 2013-01-29Bibliographically approved

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