A mixed-signal timing circuit in 90nm CMOS for energy detection IR-UWB receivers
2010 (English)In: 23rd IEEE International SOC Conference, SOCC 2010, 2010, 413-416 p.Conference paper (Other academic)
This paper presents a flexible timing circuit with 1.1ns delay resolution for energy detection IR-UWB receivers. Referenced at 900MHz input clock, the circuit generates multi-phased integration windows and reset signals that enable/disable the operation of analog blocks. The design is highly programmable, adapting the receiver to pulse level synchronization, symbol level synchronization, different data rates and various channel environments. Mixed-signal design flow is adopted to avoid the complexity of full custom design and the large power consumption of full synthesized digital design. The timing circuit is implemented in UMC 90nm CMOS process, with 219 #x03BC;W power consumption and 190*295 #x03BC;m2 die area.
Place, publisher, year, edition, pages
2010. 413-416 p.
CMOS;energy detection IR-UWB receivers;mixed-signal design flow;mixed-signal timing circuit;multiphased integration windows;power 219 muW;pulse level synchronization;reset signals;size 90 nm;symbol level synchronization;CMOS integrated circuits;mixed analogue-digital integrated circuits;radio receivers;synchronisation;timing circuits;ultra wideband communication;
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-49207DOI: 10.1109/SOCC.2010.5784668ScopusID: 2-s2.0-79960743674ISBN: 978-142446683-2OAI: oai:DiVA.org:kth-49207DiVA: diva2:459401
23rd IEEE International SOC Conference, SOCC 2010; Las Vegas, NV; United States; 27 September 2010 through 29 September 2010;
QC 201507142011-11-252011-11-252015-07-14Bibliographically approved