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Analog circuit optimization via a modified Imperialist Competitive Algorithm
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.ORCID iD: 0000-0003-3802-7834
2011 (English)In: 2011 IEEE International Symposium on Circuits and Systems (ISCAS) / [ed] IEEE, IEEE conference proceedings, 2011, 2273-2276 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper proposes a novel evolutionary approach based on a modified Imperialist Competitive Algorithm for analog circuit design optimization. The original Imperialist Competitive Algorithm shows a low search ability in high-dimensional search spaces which is the case in optimization of analog circuits. The proposed tool addresses this problem by introducing a society-based algorithm with novel “selection” and “movement” operators. The tool is also equipped with a “mutation” operator increasing the search ability. A multi-dimensional analog design problem along with a mathematical benchmark are used to demonstrate its capability. Moreover, a thorough comparison between the original Imperialist Competitive Algorithm, the proposed algorithm and genetic algorithm as a reference is carried out. It will be revealed that the proposed algorithm is capable of exploring the cost space more efficiently resulting in better trade-offs between design objectives to reach better cost values. Additionally, the proposed algorithm is faster than the other under-test algorithms which is a key feature in simulation-based optimization procedures.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2011. 2273-2276 p.
Series
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, ISSN 0271-4302
Keyword [en]
Design; Evolutionary algorithms; Integrated circuit manufacture; Mathematical operators; Optimization
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-58775DOI: 10.1109/ISCAS.2011.5938055ISI: 000297265302149Scopus ID: 2-s2.0-79960880802ISBN: 978-1-4244-9472-9 (print)ISBN: 978-1-4244-9473-6 (print)OAI: oai:DiVA.org:kth-58775DiVA: diva2:473972
Conference
ISCAS, IEEE International Symposium on Circuits and Systems, Rio de Janeiro, Brazil, 15-18 May, 2011
Note
QC 20120109Available from: 2012-01-08 Created: 2012-01-08 Last updated: 2012-04-03Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
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