Cooperative communication based barrier synchronization in on-chip mesh architectures
2011 (English)In: IEICE ELECTRON EXPR, ISSN 1349-2543, Vol. 8, no 22, 1856-1862 p.Article in journal (Refereed) Published
We propose cooperative communication as a means to enable efficient and scalable barrier synchronization on mesh-based many-core architectures. Our approach is different from but orthogonal to conventional algorithm-based optimizations. It relies on collaborating routers to provide efficient gather and multicast communication. In conjunction with a master-slave algorithm, it exploits the mesh regularity to achieve efficiency. The gather and multicast functions have been implemented in our router. Synthesis results suggest marginal area overhead. With synthetic and benchmark experiments, we show that our approach significantly reduces synchronization completion time and increases speedup.
Place, publisher, year, edition, pages
2011. Vol. 8, no 22, 1856-1862 p.
cooperative communication, barrier synchronization
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-58820DOI: 10.1587/elex.8.1856ISI: 000297954500002ScopusID: 2-s2.0-82455198655OAI: oai:DiVA.org:kth-58820DiVA: diva2:474428
QC 201201092012-01-092012-01-092012-01-09Bibliographically approved