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Low-cost Through Silicon Vias (Tsvs) with wire-bonded metal cores and low capacitive substratecoupling:  
KTH, School of Electrical Engineering (EES), Microsystem Technology.ORCID iD: 0000-0003-3452-6361
KTH, School of Electrical Engineering (EES), Microsystem Technology.
KTH, School of Electrical Engineering (EES), Microsystem Technology.ORCID iD: 0000-0001-9552-4234
KTH, School of Electrical Engineering (EES), Microsystem Technology.ORCID iD: 0000-0002-0525-8647
2010 (English)In: Proceedings: 8th Micronano System Technology Event (MSW 2010), Stockholm: - , 2010, , 30 p.30-30 p.Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
Stockholm: - , 2010. , 30 p.30-30 p.
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:kth:diva-59171OAI: oai:DiVA.org:kth-59171DiVA: diva2:475241
Conference
8th Micronano System Technology Event (MSW), Stockholm, Sweden 4-5 May 2010
Note
QC 20120112Available from: 2012-01-10 Created: 2012-01-10 Last updated: 2012-01-12Bibliographically approved

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Fischer, Andreas C.Stemme, GöranNiklaus, Frank

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