Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Semi-formal refinement of heterogeneous embedded systems by foreign model integration
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0002-2171-1528
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0003-4859-3100
2011 (English)In: 2011 Forum on Specification and Design Languages (FDL), IEEE conference proceedings, 2011, 179-186 p.Conference paper, Published paper (Refereed)
Abstract [en]

There is a need for integration of external models in high-level system design flows. We introduce a set of partial refinement operations to implement models of heterogeneous embedded systems. The models are in form of process networks where each process belongs to a single model of computation. A semi-formal design flow has been introduced based on these operations to incrementally refine system specifications to their implementation. Wrapper processes, which allow co-simulation of a system model in the framework with external models and implementations are used to keep the intermediate system models after each refinement step verifiable. Additionally, this design flow has the advantage of integrating legacy code and IP cores. Using a simple example as the case study, we have shown how we can apply this design methodology to a simple system.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2011. 179-186 p.
Keyword [en]
Adaptation models, Computational modeling, Data models, embedded systems, foreign model integration, formal specification, formla system design, ForSyDe, Hardware, hardware description languages, Hardware design languages, HDL, heterogeneous embedded systems, high-level system design, incremental system specification refinement, IP core, legacy code, partial refinement operation, process network, semiformal design flow, software, synchronization, system model, systems analysis, wrapper process
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:kth:diva-62149Scopus ID: 2-s2.0-82955190416ISBN: 978-2-9530504-3-1 (print)OAI: oai:DiVA.org:kth-62149DiVA: diva2:479885
Conference
2011 Forum on Specification and Design Languages (FDL)
Projects
SYSMODEL
Funder
EU, FP7, Seventh Framework Programme
Note
© 2011 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. QC 20120201Available from: 2012-02-01 Created: 2012-01-18 Last updated: 2014-11-17Bibliographically approved
In thesis
1. Managing the Complexity in Embedded and Cyber-Physical System Design: System Modeling and Design-Space Exploration
Open this publication in new window or tab >>Managing the Complexity in Embedded and Cyber-Physical System Design: System Modeling and Design-Space Exploration
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

To cope with the increasing complexity of embedded and cyber-physical system design, different system-level design approaches are proposed which start from abstract models and implement them using design flows with high degrees of automation. However, creating models of such systems and also formulating the mathematical problems arising in these design flows are themselves challenging tasks. A promising approach is the composable construction of these models and problems from more basic entities. Unfortunately, it is non-trivial to propose such compositional formulations today because the current practice in the electronic design automation domain tends to be on using imperative languages and frameworks due to legacy and performance-oriented reasons.

This thesis addresses the system design complexity by first promoting proper formalisms and frameworks for capturing models and formulating design-space exploration problems for electronic system-level design in a declarative style; and second, propose realizations based on the industrially accepted languages and frameworks which hold the interesting properties such as composability and parallelism.

For modeling, ForSyDe, a denotational system-level modeling formalism for heterogeneous embedded systems is chosen, extended with timed domains to make it more appropriate for capturing cyber-physical systems, and mapped on top of the IEEE standard system design language SystemC. The realized modeling framework, called ForSyDe-SystemC, can be used for modeling systems of heterogeneous nature and their composition to form more sophisticated systems and also conducting parallel and distributed simulation for boosting the simulation speed. Another extension to ForSyDe, named wrapper processes, introduces the ability to compose formal ForSyDe models with legacy IP blocks running in external execution environments to perform a heterogeneous co-simulation.

In platform-based design flows, the correct and optimal mapping of an application model onto a flexible platform involves solving a hard problem, named design space exploration. This work proposes Tahmuras, a constraint- based framework to construct generic design space exploration problems as the composition of three individual sub-problems: the application, the platform, and the mapping and scheduling problems. In this way, the model of the design space exploration problem in Tahmuras is automatically generated for each combination of application semantics, target platform, and mapping and scheduling policy simply by composing their respective problems. Using constraint programming, problems can be modeled in a declarative style, while they can be solved in a variety of different styles, including imperative solving heuristics commonly used to solve difficult problems. Efficient parallel solvers exists for constraint programming. 

Abstract [sv]

Den ökande komplexiteten är en stor utmaning för konstruktionen av framtida inbyggda system. För att möta utmaningen utvecklas nu konstruktionsmetoder som har som mål att starta från en abstrakt modell och att generera en implementering genom ett konstruktionsflöde med hög automatiseringsgrad. Dessvärre är dock skapandet av abstrakta systemmodeller och formaliseringen av de relaterade matematiska problemen i sig ett mycket utmanande problem. Konstruktion genom komposition av basenheter är en lovande idé, men tyvärr är det väldigt svårt att introducera metoden i dagens industriella konstruktionsflöden på grund av imperativa programmeringsspråk och ett gammalt arv i form av existerande kodbas och äldre konstruktioner.

Avhandlingen adresserar komplexiten inom systemkonstruktion genom att föreslå passande formalismer för att uttrycka modeller i en deklarativ stil och angripa problemet att hitta en passande implementering. Dessutom visar avhandlingen hur dessa formalismer kan realiseras i en form som kan användas i ett industriellt sammanhang utan att förlora formalismens viktiga grundläggande egenskaper som komposition och parallelism.

Modelleringen använder och utökar ForSyDe, en konstruktionsmetod för heterogena inbyggda system. Tilläggen består av en modelleringsmodell som kan fånga specifika egenskaper hos heterogena inbyggda system, samt en implementering av ForSyDe i SystemC, ett industriellt modelleringsspråk som är standardiserat av IEEE. Den nya utvecklingsmiljön, ForSyDe-SystemC, kan användas för att modellera inbyggda system, komponera systemmodeller till större system, samt möjliggör genomförandet av parallella och distribuerade simuleringar med medföljande hög simuleringshastighet. Avhandlingen introducerar också “wrapper”-konceptet i ForSyDe som möjliggör integrationen av existerande modeller och system som en del av en formell ForSyDe-modell och deras co-simulering. ForSyDe-SystemC har använts inom EU-projekt av industriella partner för modellering av egna system.

Att hitta en korrekt och effektiv implementering av en abstrakt systemmodell är målet inom aktiviteten “design space exploration” (DSE) som är ett svårt problem för parametriserbara och flexibla plattformar. Avhandlingen presenterar två generationer av Tahmuras, som är baserade på villkorsprogrammering och har som mål att konstruera DSE-problemet som en komposition av tre olika delproblem: applikation, plattform, och bindning. Ett integrerat DSE-problem kan sedan automatiskt genereras genom en kombination av dessa delproblem. Olika metoder, från heuristisk till komplett sökning, kan användas inom villkorsprogrammering för att lösa DSE-problemet. För att visa Tahmuras potential har DSE-metoden validerats med hjälp av olika systemapplikationer av skilda tidsegenskaper och olika plattformar. 

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2014. xvi, 104 p.
Series
TRITA-ICT-ECS AVH, ISSN 1653-6363 ; 14:12
National Category
Embedded Systems
Identifiers
urn:nbn:se:kth:diva-155939 (URN)978-91-7595-286-4 (ISBN)
Public defence
2014-12-05, Sal B, Electrum 229, KTH-ICT, Kista, 13:00 (English)
Opponent
Supervisors
Note

QC 20141117

Available from: 2014-11-17 Created: 2014-11-15 Last updated: 2014-11-17Bibliographically approved

Open Access in DiVA

fulltext(411 kB)198 downloads
File information
File name FULLTEXT01.pdfFile size 411 kBChecksum SHA-512
948a91c9abab9a1cfd53982dfd2eb5d1b9a8c7805fb63105dfe9f0fd228650b76050177bf5482ba428be51ceef17d86ba7f56c416321374f2bb7c98a57e53996
Type fulltextMimetype application/pdf

Other links

ScopusIEEEXplore

Authority records BETA

Attarzadeh Niaki, Seyed HoseinSander, Ingo

Search in DiVA

By author/editor
Attarzadeh Niaki, Seyed HoseinSander, Ingo
By organisation
Electronic Systems
Embedded Systems

Search outside of DiVA

GoogleGoogle Scholar
Total: 198 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

isbn
urn-nbn

Altmetric score

isbn
urn-nbn
Total: 121 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf