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Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
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2009 (English)In: 2009 IEEE INTERNATIONAL CONFERENCE ON 3D SYSTEMS INTEGRATION, San Francisco: IEEE conference proceedings, 2009, 345-351 p.Conference paper, Published paper (Refereed)
Abstract [en]

The physical performance of a 3-Dimensional Network-on-Chip (NoC) mesh architecture employing through silicon vias (TSV) for vertical connectivity is investigated with a cycle-accurate RTL simulator. The physical latency and area impact of TSVs, switches, and the on-chip interconnect is evaluated to extract the maximum signaling speeds through the switches, horizontal and vertical network links. The relatively low parasitics of TSVs compared to the on-chip 2-D interconnect allow for higher signaling speeds between chip layers. The system-level impact on overall network performance as a result of clocking vertical packets at a higher rate through the TSV interconnect is simulated and reported.

Place, publisher, year, edition, pages
San Francisco: IEEE conference proceedings, 2009. 345-351 p.
Keyword [en]
cycle-accurate RTL simulator;horizontal network link;multiclock 3-dimensional network-on-chip mesh architecture;on-chip interconnect;physical mapping;switches;system-level impact;through silicon vias;vertical network link;integrated circuit interconnections;network analysis;network-on-chip;
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:kth:diva-62170DOI: 10.1109/3DIC.2009.5306540ISI: 000275055600063Scopus ID: 2-s2.0-70549103317ISBN: 978-1-4244-4511-0 (print)OAI: oai:DiVA.org:kth-62170DiVA: diva2:479916
Conference
IEEE International Conference on 3D Systems Integration, San Francisco, CA, SEP 28-30, 2009
Projects
EU-FP7 ELITE-205030
Note
QC 20120120Available from: 2012-01-18 Created: 2012-01-18 Last updated: 2012-03-22Bibliographically approved

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Lu, Zhonghai

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
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  • modern-language-association-8th-edition
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Output format
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