Shared Memory Consistency Models Evaluation in NoC based Multicore Systems
2012 (English)In: Design, Automation and Test in Europe (DATE 2012), PhD Forum, Dresden, Dermany: EDAA / ACM SIGDA , 2012Conference paper (Refereed)
This paper overviews our study on various shared memory consistency models, Sequential Consistency (SC), Weak Consistency (WC), Release Consistency (RC), and Protected Release Consistency (PRC) models in Network-on-Chip (NoC) based Distributed Shared Memory (DSM) multi-core systems. These memory models are implemented by using a transaction counter (TC) based unified approach in the NoC based systems. The performance gain observed in the WC, RC and PRC relaxed memory models under various benchmarks is between 20% and 50% compared to the SC strict model.
Place, publisher, year, edition, pages
Dresden, Dermany: EDAA / ACM SIGDA , 2012.
Network-on-Chip, Distributed shared memory, Memory consistency, Protected release consistency, Scalability
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-62191OAI: oai:DiVA.org:kth-62191DiVA: diva2:479954
Design, Automation and Test in Europe (DATE 2012), 12-16 March Dresden, Germany