A 5Mgate/414mW Networked Media SoC in 0.13um CMOS with 720p Multi-Standard Video Decoding
2009 (English)In: 2009 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), IEEE Solid-State Circuits Society, 2009, 385-388 p.Conference paper (Refereed)
A flexible and high performance SoC is developed for networked media applications by integrating two RISC cores, Ethernet network interface and coarse-grained configurable video decoding unit. Real-time 1280x720@25fps MPEG-2/MPEG-4/RealVideo decoding is achieved for on-line video streams. The SoC is fabricated in 0.13um single-poly eight-metal CMOS technology with core size of 6.4mm * 6.4mm. To achieve low power design, flexible power management strategy is implemented for dynamically control of computational capabilities with various workloads. The maximum power consumption is 414mW at 1.2V supply voltage with the corresponding system frequency of 216MHz, when real-time HD (1280x720@25fps) video streams are decoded. When the SoC decodes real-time CIF (352x288@25fps) video streams, it requires 27MHz system frequency and consumes 95mW.
Place, publisher, year, edition, pages
IEEE Solid-State Circuits Society, 2009. 385-388 p.
, IEEE Asian Solid-State Circuits Conference Proceedings of Technical Papers
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-62206DOI: 10.1109/ASSCC.2009.5357177ISI: 000298194200097ScopusID: 2-s2.0-76249116270ISBN: 978-1-4244-4434-2OAI: oai:DiVA.org:kth-62206DiVA: diva2:479957
“”, IEEE Asian Solid-State Circuits Conference (ASSCC), Taipei, TAIWAN, NOV 16-18, 2009
QC 201202242012-01-182012-01-182015-10-09Bibliographically approved