Bandwidth Optimization for Through Silicon Via(TSV) bundles in 3D Integrated Circuits
2009 (English)In: DATE'09 Friday Workshops - 3D Integration - Technology, Architecture, Design, Automation, and Test, Nice, France: DATE Conference , 2009, 283-287 p.Conference paper (Refereed)
Through silicon vias (TSVs) are the backbone of 3D integration technology connecting vertically stacked ICs. Parallel TSVs in the form of bundles are used for vertical signaling.In this paper, we present the ways of maximizing the total bandwidth of a TSV bundle placed in a fixed area by varying the density and the geometries. The ways of optimizing the total bandwidth using analytical methods fora bundle of TSVs placed in a structure with a fixed area and length are examined. The result shows that for uniformly distributed TSVs, maximum bandwidth by proportionalplacement of fewer number of TSV in the bundle can be achieved.
Place, publisher, year, edition, pages
Nice, France: DATE Conference , 2009. 283-287 p.
TSV bandwidth, 3D integration, TSV RC model
IdentifiersURN: urn:nbn:se:kth:diva-62183OAI: oai:DiVA.org:kth-62183DiVA: diva2:480055
DATE'09 Friday Workshops - 3D Integration - Technology, Architecture, Design, Automation, and Test. Nice, France. April 24, 2009
QC 20120119. QC 201602092012-01-182012-01-182016-02-09Bibliographically approved