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Towards open network-on-chip benchmarks
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
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2007 (English)In: NOCS 2007: FIRST INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP, PROCEEDINGS, 2007, 205-212 p.Conference paper (Refereed)
Abstract [en]

Measuring and comparing performance, cost, and other features of advanced communication architectures for complex multi core/multiprocessor systems on chip is a significant challenge which has hardly been addressed so far. This document outlines the top-level view on a system of benchmarks for Networks on Chip (NoC), which intends to cover a wide spectrum of NoC design aspects, from application modeling to performance evaluation and post-manufacturing test and reliability. For performance benchmarking, requirements and features are described for application programs, synthetic micro-benchmarks, and abstract benchmark applications. Then, it proposes ways to measure and benchmark reliability, fault tolerance and testability of the on-chip communication fabric. This paper introduces the main concepts and ideas for benchmarking NoCs in a systematic and comparable way. It will be followed up by a report that will define a benchmark framework and the syntax of interfaces for benchmark programs that will allow the community to build-up a benchmark suite.

Place, publisher, year, edition, pages
2007. 205-212 p.
Keyword [en]
metrics, networks-on-chip, performance evaluation, benchmarks
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
URN: urn:nbn:se:kth:diva-63659DOI: 10.1109/NOCS.2007.44ISI: 000246800500020ScopusID: 2-s2.0-36349022659OAI: diva2:482738
1st International Symposium on Networks-on-Chip. Princeton, NJ. MAY 07-09, 2007
QC 20120306Available from: 2012-01-24 Created: 2012-01-24 Last updated: 2012-03-06Bibliographically approved

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Jantsch, Axel
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