Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Multi-phase Validation of Hardware/Software Interfaces based on Generated Simulation Models
KTH, School of Information and Communication Technology (ICT), Electronic Systems.
1998 (English)In: Proceedings of the IEEE International High Level Design Validation and Test Workshop, 1998Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
1998.
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-63900OAI: oai:DiVA.org:kth-63900DiVA: diva2:483234
Note
NR 20140805Available from: 2012-01-25 Created: 2012-01-24 Last updated: 2012-01-25Bibliographically approved

Open Access in DiVA

No full text

By organisation
Electronic Systems
Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar

urn-nbn

Altmetric score

urn-nbn
Total: 14 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf