Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Physical Performance Modelling for Platform-based SoC Design
KTH, Superseded Departments, Electronic Systems Design.
KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. KTH, Superseded Departments, Electronic Systems Design.
KTH, Superseded Departments, Electronic Systems Design.
Show others and affiliations
2002 (English)In:  , 2002Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
2002.
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-63896OAI: oai:DiVA.org:kth-63896DiVA: diva2:483239
Conference
Proceedings of the 4th European Workshop on Microelectronics Education
Note
NR 20140805Available from: 2012-01-25 Created: 2012-01-24 Last updated: 2012-02-13Bibliographically approved

Open Access in DiVA

No full text

Search in DiVA

By author/editor
Tenhunen, HannuZheng, Li-RongJantsch, Axel
By organisation
Electronic Systems DesignVinnExcellence Center for Intelligence in Paper and Packaging, iPACK
Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar

urn-nbn

Altmetric score

urn-nbn
Total: 17 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf