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The MOSART Mapping Optimization for multi-core Architectures
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2011 (English)In: VLSI 2010 Annual Symposium, Springer Publishing Company, 2011, 181-195 p.Conference paper (Refereed)
Abstract [en]

MOSART project addresses two main challenges of prevailing architectures: (i) Theglobal interconnect and memory bottleneck due to a single, globally shared memorywith high access times and power consumption; (ii) The difficulties in programmingheterogeneous, multi-core platforms MOSART aims to overcome these through amulti-core architecture with distributed memory organization, a Network-on-Chip(NoC) communication backbone and configurable processing cores that are scaled,optimized and customized together to achieve diverse energy, performance, cost andsize requirements of different classes of applications. MOSART achieves this by:(i) Providing platform support for management of abstract data structures includingmiddleware services and a run-time data manager for NoC based communicationinfrastructure; (ii) Developing tool support for parallelizing and mapping applicationson the multi-core target platform and customizing the processing cores for theapplication.

Place, publisher, year, edition, pages
Springer Publishing Company, 2011. 181-195 p.
, Lecture Notes in Electrical Engineering, 105
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
URN: urn:nbn:se:kth:diva-66356DOI: 10.1007/978-94-007-1488-5_11ScopusID: 2-s2.0-84863014817OAI: diva2:483777
IEEE Computer Society Annual Symposium, ISVLSI 2010. Lixouri Kefalonia, Greece. July 5-7 2010
QC 20120416Available from: 2012-01-25 Created: 2012-01-25 Last updated: 2012-04-16Bibliographically approved

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Lu, ZhonghaiChen, XiaowenChabloz, Jean-MichelHemani, AhmedJantsch, Axel
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