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Synchronization Algorithms and VLSI Implementation for DC-OFDM based UWB System
KTH, School of Information and Communication Technology (ICT).
2011 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

UWB is a promising technology for short-range high-rate wireless applicationa.It is able to providemaximal 480Mbps data-rate at a distance of 2 meters in realisticindoormulti-path environments. UWB technology is widely applied to the next generation WPAN as well as the wireless accessof consumer electronics at home. Recently, Multi-Band OFDM based UWB technology proposed by WiMedia has been selected as the international standard by ISO. In China, a new transmission architecture based on Dual-Carrier OFDM technology is adopted as UWB standard draft. Comparing to MB-OFDM based UWB system, DC-OFDM based UWB system has multiple advantages, like more spectrum resource,lower requirements on devices, etc. Besides, it is compatiblewith existing MB-OFDM based UWB technology. Therefore, DC-OFDM based UWB is more flexible.

Synchronizationis the first step atthe receiver digital baseband, which is of tremendous importance in any wireless communication systems. The performance of synchronization directly determines whether the receiver can pick up radio signals correctly or not, whether the baseband modules can fulfill the digital signal processing effectively or not. The synchronization process in OFDM system can be briefly divided into two parts: symbol timing and frequency synchronization. Symbol timing serves to judge the starting position of OFDM symbolsafter considering the impact of multi-path fading channel.While the frequency synchronization estimates the multiple imperfections in analog front-end signal processing and make proper compensation.

This thesis puts the emphasis on synchronization issues in DC-OFDM based UWB systems. We are the first to analyze the synchronization algorithm as well as the hardware implementation method tailored for DC-OFDM based UWB system. We also present the VLSI implementation result for synchronization module. The thesis consists of symbol timing and frequency synchronization.

Regarding on the symbol timing, we analyze the impact of several synchronization errors inOFDM system. After that, we divide the synchronization process into four modulesby functionality: packet detection, coarse timing, TFC detection and fine timing. The internal parameters in each moduleare determined by system simulations. In the aspect of algorithm development, we adopt the joint auto-correlation and cross-correlation method to meet the requirements of UWB system in different indoor multi-path environments, and therefore achieve the robustness. In the aspect of hardware implementation, we put the attention on the structure of some key modules in symbol timing and their VLSI implementation result, such as auto-correlator, cross-correlator, real-number divider, etc.

Regarding on the frequency synchronization, we first investigate the multiple analog front-end imperfections in OFDM system, like CFO, SFO and I/Q imbalance, and present their mathematics models respectively in DC-OFDM based UWB system.After that, we analyze the performance degradation in OFDM system due to these non-ideal effects by the metric of EVM. RF designer can build the connection between mismatching parameters and performance degradation by referring to the analysis. Hence, theRF designer is able to traceout the outline of system design. In the aspect of algorithm development, we explore the intrinsic character of I/Q imbalancewhich causes the image interference. Then, we design a set of new training sequences based on phase rotation and give the corresponding estimation algorithm.The simulation result shows that the new training sequence is able to obtain the diversity message introduced by I/Q imbalance and therefore achieve the diversity gain during demodulation process. In order to deal with the challenging situation where multiple analog front-end imperfections co-exist, we propose a joint estimation and compensation scheme. In the aspect of hardware implementation, we present the hardware structure of CFO estimation and compensation module catered for DC-OFDM based UWB system, with the emphasis on CORDIC unit that is responsible for triangle calculations. The VLSI implementation result shows that the proposed CFO estimation and compensation module satisfies the timing and resource requirements in DC-OFDM based UWB system.

In the last, we present the prospective research area in 60-GHz applications. It includes multiplenon-ideal impairments, like phase noise, non-linear power amplification, DC offset, ADCs mismatch, etc. It is even more challenging to develop joint estimation and compensation scheme for these non-ideal effects.

Place, publisher, year, edition, pages
2011. , 102 p.
Trita-ICT-EX, 48
Keyword [en]
UWB, OFDM, syncronization, VLSI implementation
National Category
Engineering and Technology
URN: urn:nbn:se:kth:diva-66729OAI: diva2:484516
Subject / course
Electronic- and Computer Systems
Educational program
Master of Science - System-on-Chip Design
Available from: 2012-01-27 Created: 2012-01-27 Last updated: 2012-01-27Bibliographically approved

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