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Evaluation and Comparison of Threshold Logic Gates
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.ORCID iD: 0000-0001-7382-9408
2007 (English)In: Multiple-Valued Logic, 2007. ISMVL 2007. 37th International Symposium on, IEEE Computer Society, 2007, 52-52 p.Conference paper, Published paper (Refereed)
Abstract [en]

The threshold logic has a long history of more than 60 years. Many implementations have been proposed during the last decades. In this paper, we make a survey of most interesting implementations of capacitive, conductance/current and differential threshold logic gates. Using the Cadence Virtuoso© Mixed Signal Front to Back, we evaluate and compare these implementations in terms of speed, area and power consumption for basic circuits.

Place, publisher, year, edition, pages
IEEE Computer Society, 2007. 52-52 p.
Series
International Symposium on Multiple-Valued Logic. Proceedings, ISSN 0195-623X
Keyword [en]
Threshold Logic Gates, Capacitive, Conductance and Differential Logic
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-62763DOI: 10.1109/ISMVL.2007.18Scopus ID: 2-s2.0-34548266087ISBN: 978-076952831-1 (print)OAI: oai:DiVA.org:kth-62763DiVA: diva2:484518
Conference
37th International Symposium on Multiple-Valued Logic, ISMVL 2007; Oslo; 13 May 2007 through 16 May 2007
Note
QC 20120228Available from: 2012-01-27 Created: 2012-01-20 Last updated: 2012-02-28Bibliographically approved

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Dubrova, Elena

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