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TOP: An Algorithm for Three-Level Optimization of PLDs
KTH, School of Information and Communication Technology (ICT), Electronic Systems.
2000 (English)In: Proceedings of Design, Automation and Test in Europe Conference and Exhibition, 2000Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
2000.
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-62783OAI: oai:DiVA.org:kth-62783DiVA: diva2:484544
Note
Poster NR 20140805Available from: 2012-01-27 Created: 2012-01-20 Last updated: 2012-01-27Bibliographically approved

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CiteExportLink to record
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Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
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Output format
  • html
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  • asciidoc
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