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Data Parallel Performance Optimizations Using Array Aliasing
KTH, School of Computer Science and Communication (CSC), Centres, Centre for High Performance Computing, PDC. (Parallelldatorcentrum)
1999 (English)In: Algorithms for Parallel Processing, Springer-Verlag New York, 1999, 105, 213-246 p.Chapter in book (Refereed)
Abstract [en]

The array aliasing mechanism provided in the Connection Machine Fortran (CMF) language and run{time system provides a unique way of identifying the memory address spaces local to processors within the global address space of distributed memory architectures, while staying in the data parallel programming paradigm. We show how the array aliasing feature can be used e ectively in optimizing communication and computation performance. The constructs we present occur frequently in many sci- enti c and engineering applications, and include various forms of aggregation and array reshaping through array aliasing. The e ectiveness of the optimization techniques is demonstrated on an implementation of Anderson’s hierarchical O(N ) N {body method

Place, publisher, year, edition, pages
Springer-Verlag New York, 1999, 105. 213-246 p.
Keyword [en]
Data parallel programming, array aliasing, hierarchical N {body meth-ods.
National Category
Computer and Information Science
Identifiers
URN: urn:nbn:se:kth:diva-70072OAI: oai:DiVA.org:kth-70072DiVA: diva2:485830
Note
NR 20140805Available from: 2012-01-30 Created: 2012-01-30Bibliographically approved

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