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Scheduling of outputs in grammar-based hardware synthesis of data communication protocols
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0002-8072-1742
KTH, Superseded Departments, Electronic Systems Design.
KTH, Superseded Departments, Electronic Systems Design.ORCID iD: 0000-0003-0565-9376
1998 (English)In: Design, Automation and Test in Europe, 1998., Proceedings, 1998, 596-603 p.Conference paper, Published paper (Refereed)
Abstract [en]

We present a grammar based specification method for hardware synthesis of data communication protocols in which the specification is independent of the port size. Instead, it is used during the synthesis process as a constraint. When the width of the output assignments exceed the chosen output port width, the assignments are split and scheduled over the available states. We present a solution to this problem and results of applying it to some relevant problems

Place, publisher, year, edition, pages
1998. 596-603 p.
Keyword [en]
available states;constraint;data communication protocols;grammar-based hardware synthesis;output assignments;output scheduling;specification method;synthesis process;data communication;grammars;protocols;scheduling;specification languages;
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-73104DOI: 10.1109/DATE.1998.655919OAI: oai:DiVA.org:kth-73104DiVA: diva2:488538
Conference
Design, Automation and Test in Europe, 1998
Note
NR 20140805Available from: 2012-02-01 Created: 2012-02-01 Last updated: 2012-02-17Bibliographically approved

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Öberg, JohnnyHemani, Ahmed

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