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A reconfigurable and adaptive routing method for fault-tolerant mesh-based networks-on-chip
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2011 (English)In: AEU - International Journal of Electronics and Communications, ISSN 1434-8411, E-ISSN 1618-0399, Vol. 65, no 7, 630-640 p.Article in journal (Refereed) Published
Abstract [en]

High reliability against undesirable effects is one of the key objectives in the design of on-chip networks. This paper presents a very low cost fault-tolerant routing method to tolerate faulty links and routers in mesh-based Networks-on-Chip. This new algorithm can be dynamically reconfigured to support irregular topologies caused by faulty components in a mesh network. In addition, it is a distributed, adaptive and congestion-aware routing algorithm where only two virtual channels are used for both adaptiveness and fault-tolerance. The proposed routing method has a multi-level fault-tolerance capability and therefore it is capable to tolerate more faulty components in more complicated faulty situations with additional hardware costs. The network performance, fault-tolerance capability and hardware overhead are evaluated through appropriate simulations and syntheses. The experimental results show that the overall reliability of a Network-on-Chip is significantly enhanced against multiple component failures with only a small hardware overhead.

Place, publisher, year, edition, pages
2011. Vol. 65, no 7, 630-640 p.
Keyword [en]
Network-on-Chip, Fault tolerance, Routing algorithm, Reconfiguration, Congestion
National Category
Engineering and Technology
URN: urn:nbn:se:kth:diva-73393DOI: 10.1016/j.aeue.2010.09.002ISI: 000291447900003OAI: diva2:488873

QC 20120203

Available from: 2012-02-02 Created: 2012-02-02 Last updated: 2016-04-20Bibliographically approved

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Tenhunen, Hannu
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ReferencesLink to record
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