Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Enhancing performance sustainability of fault tolerant routing algorithms in NoC-based architectures
University of Turku and Turku Centre for Computer Science (TUCS).
University of Turku and Turku Centre for Computer Science (TUCS).
University of Turku and Turku Centre for Computer Science (TUCS).
ABB Corporate Research.
Show others and affiliations
2011 (English)In: Proceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011, 2011, 626-633 p.Conference paper, Published paper (Refereed)
Abstract [en]

Reliability of embedded systems and devices is becoming a challenge with technology scaling. To deal with the reliability issues, fault tolerant solutions are needed. The design paradigm for future System-on-Chip (SoC) implementation is Network-on-Chip (NoC). Fault tolerance in NoC can be achieved at many abstraction levels. Many fault tolerant architectures and routing algorithms have already been proposed for NoC but the utilization of resources, affected indirectly by faults is yet to be addressed. In this paper, we propose a NoC architecture, which sustains the overall system performance by utilizing resources, which cannot be used by other architectures under faults. An approach towards a proper virtual-channel (VC) sharing strategy is proposed, based on communication bandwidth requirements. The technique can be applied to any NoC architecture, including 3-D NoCs. Extensive quantitative experiments with synthetic benchmarks, including uniform, transpose and negative exponential distribution (NED), demonstrate considerable improvement in terms of performance sustainability under faulty conditions compared to existing VC-based NoC architectures.

Place, publisher, year, edition, pages
2011. 626-633 p.
Keyword [en]
Fault tolerance, Networks-on-Chip (NoC), Resource utilization, Virtual channel sharing
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-73481DOI: 10.1109/DSD.2011.85Scopus ID: 2-s2.0-80055022399ISBN: 978-076954494-6 (print)OAI: oai:DiVA.org:kth-73481DiVA: diva2:488933
Conference
2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011; Oulu; 31 August 2011 through 2 September 2011
Note

QC 20120208

Available from: 2012-02-02 Created: 2012-02-02 Last updated: 2015-07-29Bibliographically approved

Open Access in DiVA

No full text

Other links

Publisher's full textScopus

Search in DiVA

By author/editor
Rahmani, Amir-MohammadTenhunen, Hannu
Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetric score

doi
isbn
urn-nbn
Total: 35 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf