PVS-NoC: Partial Virtual Channel Sharing NoC Architecture
2011 (English)In: Proceedings - 19th International Euromicro Conference on Parallel, Distributed, and Network-Based Processing, PDP 2011, IEEE , 2011, 470-477 p.Conference paper (Refereed)
A novel architecture aiming for ideal performance and overhead tradeoff, PVS-NoC (Partial VC Sharing NoC), is presented. Virtual channel (VC) is an efficient technique to improve network performance, while suffering from large silicon and power overhead. We propose sharing the VC buffers among dual inputs, which provides the performance advantage as conventional VC-based router with minimized overhead. We reason theoretically and demonstrate quantitatively the benefits of proposed architecture by comparing to state-of-the-art NoC routers, with various traffic patterns. Extensive experiments with synthetic and real benchmarks show significant area and power saving with similar performance compared to latest VC based NoC architectures.
Place, publisher, year, edition, pages
IEEE , 2011. 470-477 p.
Networks-on-Chip (NoC), Resource utilization, Virtual Channel
Engineering and Technology
IdentifiersURN: urn:nbn:se:kth:diva-73479DOI: 10.1109/PDP.2011.87ScopusID: 2-s2.0-79955019565ISBN: 978-076954328-4OAI: oai:DiVA.org:kth-73479DiVA: diva2:488937
19th International Euromicro Conference on Parallel, Distributed, and Network-Based Processing, PDP 2011; Ayia Napa; 9 February 2011 through 11 February 2011
QC 201202202012-02-022012-02-022015-07-29Bibliographically approved