Application development flow for on-chip distributed architectures
2008 (English)In: 2008 IEEE International SOC Conference, SOCC / [ed] Arslan, T; Tran, T; Buechner, T; Marshall, A, 2008, 163-168 p.Conference paper (Refereed)
We approach the construction of design methodologies for on-chip multiprocessor platforms, with the focus on the SegBus, a segmented bus platform. We study how applications can be mapped on such distributed architecture and show how to build the concrete level software procedures that will coordinate the control flow on the platform. The approach employs models developed in the Matlab-Simulink environment considering also a unified representation of both platform and application. The running example is represented by the H.264 encoder. Allocation of processing elements on the platform, structure and functionality and the eventual control code for arbiters are the in topics described here.
Place, publisher, year, edition, pages
2008. 163-168 p.
, IEEE International SOC Conference. Proceedings
Engineering and Technology
IdentifiersURN: urn:nbn:se:kth:diva-73478DOI: 10.1109/SOCC.2008.4641503ISI: 000260931700035ISBN: 978-1-4244-2596-9OAI: oai:DiVA.org:kth-73478DiVA: diva2:488948
2008 IEEE International SOC Conference, SOCC; Newport Beach, CA; 17 September 2008 through 20 September 2008
QC 201202202012-02-022012-02-022012-02-20Bibliographically approved