A Performance Estimation Technique for the SegBus Distributed Architecture
2010 (English)In: 2010 39th International Conference on Parallel Processing Workshops, ICPPW 2010, 2010, 89-98 p.Conference paper (Refereed)
We propose a performance estimation technique for a multi-core segmented bus platform, SegBus. The technique enables us to assess the performance aspects of any specific application on a particular platform configuration, modeled in Unified Modeling Language (UML). We present methods to transform Packet Synchronous Data Flow (PSDF) and Platform Specific Model (PSM) models of the application into Extensible Markup Language (XML) schemes using modeling tool and how the generated XML schemes can be utilized by the emulator program to get the execution results. The technique facilitates us to estimate performance aspects of application mapped on a number of different platform configurations during the early stages of the design process.
Place, publisher, year, edition, pages
2010. 89-98 p.
, Proceedings of the International Conference on Parallel Processing Workshops, ISSN 15302016
Extensible Markup Language;PSM models;SegBus distributed architecture;UML;Unified Modeling Language;XML schemes;emulator program;modeling tool;multicore embedded systems;multicore segmented bus platform;packet synchronous data flow transform method;performance estimation technique;platform specific model;Unified Modeling Language;XML;data flow computing;embedded systems;estimation theory;integrated circuit design;microprocessor chips;multiprocessing systems;
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-73768DOI: 10.1109/ICPPW.2010.24ScopusID: 2-s2.0-78649829782OAI: oai:DiVA.org:kth-73768DiVA: diva2:489040
2010 39th International Conference on Parallel Processing Workshops, ICPPW 2010. San Diego, CA. 13 September 2010 - 16 September 2010
QC 201203072012-02-022012-02-022012-03-07Bibliographically approved