Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Hierarchical Agent Based NoC with DVFS Techniques
Show others and affiliations
2011 (English)In: International Journal of Design, Analysis and Tools for Integrated Circuits and Systems, ISSN 2223-523X, E-ISSN 2071-2987, Vol. 1, no 1, 32-40 p.Article in journal (Refereed) Published
Abstract [en]

Network-on-Chip (NoC) is a promising architecturein the many-core on-chip systems. A hierarchical agentbased NoC architecture is proposed which enables the NoCto autonomously adjust itself, and provide maximum powerefficiency, fault/variation tolerance and system flexibility. Agentsare software or hardware components which monitor and controlthe system at different granularity. Via the joint efforts andinteractions of agents at all levels of the architecture, systemoptimization can be achieved at the runtime. Agent hierarchy,mapping of agents on regular NoC platforms and the functionpartition among the agents are elaborately discussed.Runtime power management with various Dynamic Voltageand Frequency Scaling (DVFS) techniques is analyzed on thehierarchical agent based NoC platform. Conventional powermonitoring techniques can be flexibly incorporated into the functionsof specific levels of agents. Network condition is observed bythe agents at the runtime, and the power supplies are adjusted atdifferent granularity accordingly. This paper describes the systemarchitectures of two adaptive schemes, with efficient and feasiblealgorithms presented. Quantitative experiments demonstrate thatthey achieve superior power efficiency comparing with the basicarchitecture without any runtime configuration, while different tradeoffs are applied dependent on the monitoring granularity.

Place, publisher, year, edition, pages
2011. Vol. 1, no 1, 32-40 p.
Keyword [en]
Network-on-Chip, power management, Dynamic Voltage and Frequency Scaling
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-74115OAI: oai:DiVA.org:kth-74115DiVA: diva2:489233
Note

QC 20120424

Available from: 2012-02-02 Created: 2012-02-02 Last updated: 2017-12-08Bibliographically approved

Open Access in DiVA

No full text

Search in DiVA

By author/editor
Tenhunen, Hannu
In the same journal
International Journal of Design, Analysis and Tools for Integrated Circuits and Systems
Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar

urn-nbn

Altmetric score

urn-nbn
Total: 36 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf