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Dual Monitoring Communication for Self-Aware Network-on-Chip: Architecture and Case Study
University of Turku, Finland.
University of Turku, Finland.
University of Turku, Finland.
KTH, School of Information and Communication Technology (ICT), Electronic Systems. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
2012 (English)In: International Journal of Adaptive, Resilient and Autonomic Systems, ISSN 1947-9220, E-ISSN 1947-9239, Vol. 3Article in journal (Refereed) Published
Abstract [en]

Self-aware and adaptive Network-on-Chip (NoC) with dual monitoring networks is presented. Proper monitoring interface is an essential prerequisite to adaptive system reconfiguration in parallel on-chip computing. This work proposes a DMC (dual monitoring communication) architecture to support self-awareness on the NoC platform. One type of monitoring communication is integrated with data channel, in order to trace the run-time profile of data communication in high-speed on-chip networking. The other type is separate from the data communication, and is needed to report the run-time profile to the supervising monitor. Direct latency monitoring on mesochronous NoC is presented as a case study and is directly traced in the integrated communication with a novel latency monitoring table in each router. The latency information is reported by the separate monitoring communication to the supervising monitor, which reconfigures the system to adjust the latency, for instance by dynamic voltage and frequency scaling. With quantitative evaluation using synthetic traces and real applications, the effectiveness and efficiency of direct latency monitoring with DMC architecture is demonstrated. The area overhead of DMC architecture is estimated to be small in 65nm CMOS technology.

Place, publisher, year, edition, pages
2012. Vol. 3
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-74432DOI: 10.4018/jaras.2012070105OAI: oai:DiVA.org:kth-74432DiVA: diva2:489654
Note

QC 20130108

Available from: 2012-02-03 Created: 2012-02-03 Last updated: 2017-12-08Bibliographically approved

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Tenhunen, Hannu
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Electronic SystemsVinnExcellence Center for Intelligence in Paper and Packaging, iPACK
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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
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  • Other locale
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Output format
  • html
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  • asciidoc
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