Cross Clock-Domain TDM Virtual Circuits for Networks on Chips
2011 (English)In: NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip, 2011, 209-216 p.Conference paper (Refereed)
We propose cross clock-domain time-division-multiplexing (TDM) Virtual Circuit (VC), in short, VC, to provide delay and bandwidth guaranteed communication for NoCs with multiple clock domains. The cross-domain VC extends the synchronous VC in a single clock domain to multiple clock domains. The synchronous VCs reserve cyclic time slots at each node from source to destination for a traffic flow to use shared links without contention based on the assumption that all nodes share the same notion of time. However, when VCs pass multiple clock domains with different phases and frequencies, the assumption of global synchrony is not valid any more and consequently they cannot function correctly. This paper addresses this problem based on a typical FIFO clock domain interface. We give the conditions and a realization scheme to ensure correct packet delivery with QoS for VCs crossing multiple clock domains. We apply network calculus to analyze and derive the bounds of the packet delay and the FIFO size.
Place, publisher, year, edition, pages
2011. 209-216 p.
network calculus, Network-on-Chip (NoC), quality-of-service (QoS)
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-74565DOI: 10.1145/1999946.1999980ScopusID: 2-s2.0-79960301743ISBN: 978-145030720-8OAI: oai:DiVA.org:kth-74565DiVA: diva2:489898
5th ACM/IEEE International Symposium on Networks-on-Chip, NOCS 2011; Pittsburgh, PA; 1 May 2011 through 4 May 2011
QC 201202082012-02-032012-02-032012-02-08Bibliographically approved