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An efficient VFI-based NoC architecture using Johnson-encoded Reconfigurable FIFOs
Turku Centre for Computer Science (TUCS) and University of Turku.
University of Turku.
University of Turku.
Turku Centre for Computer Science (TUCS) and University of Turku.
2010 (English)In: 28th Norchip Conference, NORCHIP 2010, 2010Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, a Johnson-encoded Reconfigurable Synchronous/Bi-Synchronous (RSBS) FIFO is proposed which can adapt its operation to either synchronous or bi-synchronous mode. The proposed FIFO which can be used to interface modules in Voltage/Frequency Islands (VFI) based Networks-on-chip, is capable of alleviating the excessive energy consumption and high performance overhead of the conventional bi-synchronous FIFOs. The FIFO is scalable and synthesizable in synchronous standard cells. In addition, a technique for mesochronous adaptation of the proposed FIFO is presented. Our extensive experiments show significant power and performance improvements compared to non-reconfigurable architectures.

Place, publisher, year, edition, pages
2010.
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:kth:diva-74764DOI: 10.1109/NORCHIP.2010.5669474Scopus ID: 2-s2.0-78751481815ISBN: 978-142448973-2 (print)OAI: oai:DiVA.org:kth-74764DiVA: diva2:489965
Conference
28th Norchip Conference, NORCHIP 2010. Tampere. 15 November 2010 - 16 November 2010
Note

QC 20120206

Available from: 2012-02-03 Created: 2012-02-03 Last updated: 2015-07-29Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
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Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
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  • text
  • asciidoc
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