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A Library Development Framework for a Coarse Grain Reconfigurable Architecture
KTH, School of Information and Communication Technology (ICT), Electronic Systems.
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0003-0565-9376
KTH, School of Information and Communication Technology (ICT), Electronic Systems.
2011 (English)In: VLSI Design (VLSI Design), 2011 24th International Conference on, 2011, 153-158 p.Conference paper, Published paper (Refereed)
Abstract [en]

A framework for efficiently capturing the rich microarchitectural space of a substantial Matlab like library of DSP functions for a regular Coarse Grain Reconfigurable Architecture (CGRA) fabric is proposed. A subset of C has been proposed to model the DSP functions and an automatic tool to generate the configware for the CGRA fabric developed. A method to estimate the average energy of such functions is reported with error margin of less than 3%. Such a framework is proposed as the basis for raising the abstraction to automate synthesis of the entire physical layers.

Place, publisher, year, edition, pages
2011. 153-158 p.
Series
Proceedings of the IEEE International Conference on VLSI Design, ISSN 1063-9667
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:kth:diva-74841DOI: 10.1109/VLSID.2011.54Scopus ID: 2-s2.0-79952842068ISBN: 9780769543482 (print)OAI: oai:DiVA.org:kth-74841DiVA: diva2:490103
Conference
24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems; Chennai; 2 January 2011 through 7 January 2011
Note
QC 20120223Available from: 2012-02-03 Created: 2012-02-03 Last updated: 2012-02-23Bibliographically approved

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Hemani, Ahmed

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