Power Scalable Digital Baseband Architecture for IEEE 802.15.4
2011 (English)In: 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems, 2011, 30-35 p.Conference paper (Refereed)
We propose a power scalable digital baseband for a low-IF receiver for IEEE 802.15.4-2006. The digital section's sampling frequency and bit width are used as knobs to reduce the power under favorable signal and interference scenarios, thus recovering the design margins introduced to handle worst case conditions. We propose tuning of these knobs based on measurements of Signal and the interference levels. We show that in a 0.13u CMOS technology, for an adaptive digital baseband section of the receiver designed to meet the 802.15.4 standard specification, power saving can be up to nearly 85% (0.49mW against 3.3mW) in favorable interference and signal conditions.
Place, publisher, year, edition, pages
2011. 30-35 p.
, Proceedings of the IEEE International Conference on VLSI Design, ISSN 10639667
IEEE 802.15.4; Low power; Power scalable receiver
IdentifiersURN: urn:nbn:se:kth:diva-77390DOI: 10.1109/VLSID.2011.64ScopusID: 2-s2.0-79952825402OAI: oai:DiVA.org:kth-77390DiVA: diva2:491536
24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems. Chennai. 2 January 2011 - 7 January 2011
QC 201202082012-02-062012-02-062012-02-08Bibliographically approved