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Non-planar devices for nanoscale CMOS
AMO GmbH, AMICA, Aachen, Germany.
2007 (English)In: Nanoscaled Semiconductor-on-Insulator Structures and Devices, Springer Netherlands, 2007, 19-32 p.Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, various concepts of multi-gate transistors are discussed with regards to their technological feasibility and rnanufacturability. In addition, non-standard fabrication process modules for triplegate nanoscale MOSFETs and sub-10 nm nanowires are presented. Alternatives to costly extreme ultraviolet (EUV) lithography are proposed as well as a self-aligned nickel silicide module to reduce inherent parasitic access resistances.

Place, publisher, year, edition, pages
Springer Netherlands, 2007. 19-32 p.
Series
NATO Science for Peace and Security Series B - Physics and Biophysics, ISSN 1871-465X
Keyword [en]
SOI, FinFET, tri-gate, triple gate, nano-CMOS, nanowire
National Category
Nano Technology
Identifiers
URN: urn:nbn:se:kth:diva-50571DOI: 10.1007/978-1-4020-6380-0_2ISI: 000248937200002ISBN: 978-1-4020-6378-7 (print)OAI: oai:DiVA.org:kth-50571DiVA: diva2:495257
Conference
NATO Advanced Research Workshop on Nanoscaled Semiconductor-on-Insulator Structures and Devices OCT 15-19, 2006 Big Yalta, UKRAINE
Note
QC 20120222Available from: 2012-02-08 Created: 2011-12-06 Last updated: 2012-02-22Bibliographically approved

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