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Investigation of high-K gate stacks with epitaxial Gd(2)O(3) and FUSINiSi metal gates down to CET=0.86 nm
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2006 (English)In: Materials Science in Semiconductor Processing, ISSN 1369-8001, E-ISSN 1873-4081, Vol. 9, no 6, 904-908 p.Article in journal (Refereed) Published
Abstract [en]

Novel gate stacks with epitaxial gadoliniurn oxide (Gd(2)O(3)) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10(-7) A cm(-2) are observed at a capacitance equivalent oxide thickness of CET = 1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd(2)O(3) thickness of 3.1 nm yield current densities down to 0.5 A cm(-2) at V(g) = + 1 V. The extracted dielectric constant for these gate stacks ranges from k = 13 to 14. These results emphasize the potential of NiSi/Gd(2)O(3) gate stacks for future material-based scaling of CMOS technology.

Place, publisher, year, edition, pages
2006. Vol. 9, no 6, 904-908 p.
Keyword [en]
high-k, epitaxial dielectric, Gd(2)O(3), metal gate, fully silicided (FUSI), NiSi, TiN
National Category
Nano Technology
Identifiers
URN: urn:nbn:se:kth:diva-50555DOI: 10.1016/j.mssp.2006.10.007ISI: 000244261600010OAI: oai:DiVA.org:kth-50555DiVA: diva2:495317
Note
QC 20120229Available from: 2012-02-08 Created: 2011-12-06 Last updated: 2017-12-07Bibliographically approved

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Lemme, Max C.
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