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Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics
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2006 (English)In: ESSDERC 2006: Proceedings of the 36th European Solid-State Device Research Conference, 2006, 150-153 p.Conference paper (Refereed)
Abstract [en]

Two process concepts for integration of novel gate stacks with epitaxial high-K dielectrics and metal gate electrodes are presented. A "gate first" process based on a planar gate stack on ultra thin SOI material has been used for successful fabrication of MOSFETs with TiN/Gd2O3 gate stack. Furthermore MOSFETs with W/Gd2O3 gate stack have been fabricated with a replacement gate process. This is the first successful attempt to integrate crystalline high-K dielectrics into a "gentle" damascene metal gate process in order to reduce process induced oxide damages.

Place, publisher, year, edition, pages
2006. 150-153 p.
, Proceedings of the European Solid-State Device Research Conference, ISSN 1930-8876
National Category
Nano Technology
URN: urn:nbn:se:kth:diva-50553DOI: 10.1109/ESSDER.2006.307660ISI: 000245038000033ISBN: 978-1-4244-0301-1OAI: diva2:495324
36th European Solid-State Device Research Conference SEP 19-21, 2006 Montreux, SWITZERLAND
QC 20120229Available from: 2012-02-08 Created: 2011-12-06 Last updated: 2012-02-29Bibliographically approved

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Lemme, Max C.
Nano Technology

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